Senior Digital Design RTL Engineer

| Austin
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About us:

Mythic has developed a unified hardware and software platform featuring its unique Mythic Analog Compute Engine (Mythic ACE™) to deliver revolutionary power, cost, and performance that shatters digital barriers preventing AI innovation at the edge. The Mythic Analog Matrix Processor (Mythic AMP™) makes it much easier and more affordable to deploy powerful AI solutions, from the data center to the edge device. The company has raised over $165.2 million to date, has over 120 employees, and has offices in Redwood City, CA, and Austin, TX.


About the role

Mythic is a fast-paced startup looking for individuals that enjoy broad, flexible roles. The primary responsibility for this position is digital RTL design of Mythic's chips, but we are looking for individuals with strong computer architecture knowledge as well. 


You will be working on our AI processing engine. You will contribute to architecture, microarchitecture, and RTL to a hybrid data flow system. Additionally, for each of these roles you will be helping to establish design practices to enable first-pass success.


Beyond digital RTL design for our novel chip architecture, this role also presents a unique opportunity to get involved with and learn more about state-of-the-art DNNs. You will also be collaborating with the system architecture, software, and analog design teams at Mythic.

Here’s what you will do:

  • Architectural definition
  • Microarchitectural definition
  • RTL design
  • Verification enablement
  • Establishing design practices for first-pass success

Here’s the background we hope you have:

  • BS in EE/CS/CSE
  • Minimum of 8 years of industry experience
  • RTL, microarchitecture, and architecture experience with advanced microprocessors and/or SOCs
  • Experience designing high performance and/or low power components such as ALU, VPU, FPU, multipliers, datapath controllers, memory systems, and interconnect.
  • Understanding of computer architecture
  • Understanding of physical timing in silicon devices and timing constraints for industry standard EDA tools
  • Strong RTL coding practices
  • Experience working with embedded cores (e.g., ARM, Tensilica, CEVA, MIPS)

The following would be nice to have, but is not required:

  • MS/PhD in EE/CS/CS
  • Experience integrating processor cores and blocks such as PCIe, USB3, MIPI, HDMI, I2C, memory interfaces, etc.
  • Experience with Design for Test (DFT) and Design for Debug (DFD) logic such as fuse controllers, memory BIST, scan dump, etc.
  • Experience working at startups
  • Experience with Python or Ruby
  • Experience with C++ or SystemC
  • Experience with formal verification
  • Experience working with a regression system
  • Experience working with a revision control system
  • Comfortable working from command line

 


At Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.


Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.


We look forward to reviewing your application!

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Location

Our office is located close to The Domain, where there are a variety of shops and dining options.

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