Jobs at NVIDIA

Develop and integrate full-system functional models for CPU architectures, support CPU architects, and enhance system software for performance modeling.

The role involves synchronizing NVIDIA's compiler codebases with open-source projects, improving developer productivity, and building tools and workflows for compiler engineers.

Drive physical design for CPUs, GPUs, and SoCs focusing on netlist-related tasks, logic synthesis, and timing closure. Help in ECO generation.

The Senior LLVM Compiler Engineer will contribute to upstream LLVM development, lead design discussions, and ensure high-quality compiler solutions in collaboration with open-source communities.

Develop core components of the CUTLASS platform, contribute to the MLIR-based backend compiler stack, and author example kernels while collaborating with GPU architecture teams.

The role involves benchmarking deep learning models on NVIDIA GPUs, improving software performance, and developing automation tools for performance optimization.

Design, develop, test, and optimize system software for next-generation ARM SoCs in pre- and post-silicon phases. Analyze system-wide performance bottlenecks, recommend HW/SW policies, perform competitive workload comparisons, and drive full-stack adoption of performance optimizations across NVIDIA software and OSS SDKs.

Serve as NVIDIA's CSP-facing principal for end-to-end performance: drive characterization with hyperscaler engineering teams, gather and synthesize workload feedback, prioritize optimizations across CUDA/NCCL/driver/firmware, validate benchmarks and tools, update stress/profiling tooling, define test strategies, and ensure performance integration and acceptance for customer-representative configurations.

Lead technical engagements with cloud service providers on rack-scale system software and firmware. Drive architecture alignment, integration readiness, error handling and recovery, health telemetry, firmware orchestration, and serviceability. Capture CSP feedback, influence NVIDIA system software design, improve tooling and tests, and mitigate execution risks through early collaboration.

Serve as technical lead between NVIDIA and hyperscale CSPs on GPU firmware and system software. Drive firmware update orchestration, recovery procedures, multi-GPU coordination, telemetry/health monitoring, and incorporate CSP feedback into NVIDIAs roadmap to improve fleet-scale manageability and reliability.

Design and deliver high-performance, area- and power-efficient ASIC/GPU micro-architecture and RTL. Develop agentic AI solutions to craft micro-architecture, implement RTL, and produce fully verified, synthesis/timing-clean designs. Collaborate with designers and tool owners, and build LLM-powered engineering assistants, multi-agent systems, and multi-modal dialogue tools to accelerate chip design workflows.

Lead design and implementation of scalable communication technologies for AI and HPC. Identify performance bottlenecks, co-design HW/SW, build proofs-of-concept, run experiments and simulations at large GPU-cluster scale to accelerate deep learning and HPC workloads.

Lead end-to-end program operations for silicon co-design: set governance and cadences, define KPIs, detect risks via data and statistics, align cross-functional teams, make high-stakes decisions, close risks, and continuously improve program speed, quality, and predictability.

Develop and optimize ML/DL compiler technologies and runtimes for NVIDIA hardware to accelerate LLMs and other AI workloads. Design kernel and DSL solutions, build efficient attention runtimes, automate development flows with AI, and co-design systems with internal hardware and software teams.

Design and evaluate hardware architectures for AI workloads, optimize deep learning performance, and collaborate across teams in product environments.

The Senior Software Engineer will focus on improving ML software stack performance, optimizing multi-GPU workloads, and resolving customer-specific issues with NCCL and CUDA libraries in data center environments.

The role involves developing and integrating energy modeling tools for NVIDIA's chips, analyzing algorithms, and improving power efficiency through data analysis and machine learning.

Develop and deploy tools and workflows for engineering. Verify design blocks, automate RTL generation, and improve IP development integration.

Verify ASIC SoCs and IP with emphasis on cache coherency across CPU/GPU memory subsystems. Develop UVM/SystemVerilog testbenches, constrained-random and directed tests, create test plans, collaborate across architecture, design, software, emulation and post-silicon teams, and drive silicon/platform verification strategies.

As a Verification Engineer, you will verify memory subsystem designs using advanced methodologies, develop verification infrastructure, and collaborate with teams.