Jobs at SpaceX

Owns global sourcing strategy and supplier management for datacenter memory and storage, including HBM, DDR5, DRAM, SSDs, and next-generation technologies. Responsibilities include forecasting demand, qualifying suppliers, negotiating high-value agreements, securing capacity, managing inventory and risks, driving cost reductions, aligning technology roadmaps, and reporting supply-chain KPIs. The role requires close collaboration with engineering, platform, and vendor teams in a fast-paced, onsite environment.

Develops physical implementation for next-generation ASICs, including synthesis, floorplanning, power grid generation, place and route, timing, noise, physical verification, electromigration, voltage drop, and signoff closure. The engineer also improves physical design methodologies and automation scripts, collaborates on architectural feasibility and RTL tradeoffs, and resolves timing, congestion, and implementation flow issues.

Leads SpaceX’s Texas state and local government affairs strategy, engaging legislators, regulatory officials, and community stakeholders. Responsibilities include building government relationships, monitoring and analyzing policy developments, conducting research, preparing policy materials, and supporting statewide government relations priorities. The role requires onsite work when not traveling, attendance at political and industry events, schedule flexibility, and travel to company facilities and events.

Owns global sourcing strategy and supplier execution for rack-level electronics supporting SpaceX AI infrastructure. Responsibilities include supplier selection, qualification, dual sourcing, capacity planning, SOW and contract negotiation, cost modeling, value engineering, NPI-to-production processes, inventory optimization, risk mitigation, KPI governance, and executive reporting. The role partners with engineering teams and suppliers to deliver high-quality, cost-efficient rack power components at extreme speed and scale.

Owns global sourcing strategy and supplier management for board-level mechanicals and connectors supporting SpaceX AI compute and networking hardware. Responsibilities include supplier selection and qualification, dual sourcing, capacity planning, SOW and commercial negotiations, cost modeling, value engineering, manufacturing assessments, risk mitigation, NPI-to-production processes, inventory strategy, KPI governance, and executive reporting. Requires close collaboration with engineering, packaging, supply chain, and component teams, plus up to 25% domestic and international travel.

Own global sourcing strategy, supplier qualification, commercial negotiations, cost reduction, capacity planning, and delivery performance for datacenter rack mechanical and cooling components. Partner with engineering and thermal teams on roadmaps, specifications, approved vendor lists, NPI, mass production, and supplier innovation. Assess factories, manage sourcing risks, optimize inventory and lead times, and present critical supply issues to executives. The role is onsite in Austin with up to 25% domestic and international travel.

Leads FP&A for SpaceX product lines, managing resource planning, spending, contract profitability, KPIs, financial reporting, variance analysis, capital expenditures, cash forecasts, and operational decision support. Partners with production, engineering, supply chain, accounting, sales, program management, and executives to improve financial performance and track obligations during rapid growth.

Lead development and optimization of DFT architectures for ASICs using Tessent and ATPG methodologies. Own scan insertion, compression, memory/logic BIST, hierarchical test flows, gate-level simulation debugging, post-silicon validation, and DFT IP integration. Automate test processes and analyze data with scripting languages. Support design readiness checks and collaborate across systems, firmware, architecture, and validation teams toward tapeout and product deployment.

Leads FP&A for SpaceX’s AI segment with executive visibility into spending, resource planning, contract profitability, capital expenditures, cash forecasts, and operational performance. Partners with production, engineering, supply chain, accounting, sales, and business leaders to analyze KPIs, variances, commitments, and financial results. Supports business initiatives, reporting, and financial close activities while managing and developing a team of financial analysts.

Lead and grow a sourcing team responsible for GPU/CPU/storage/server/rack procurement and ODM/CM relationships. Define commodity strategies and roadmaps, secure supplier capacity, negotiate agreements, manage supply risk and cost through should-cost/value engineering, track KPIs, and align cross-functionally to support large-scale AI training infrastructure.

Lead and grow a sourcing team for datacenter compute infrastructure supporting SpaceXAI. Define commodity strategies and roadmaps, secure GPU/CPU/storage supply, manage ODM/CM relationships, negotiate major agreements, mitigate supply chain risks, drive cost reduction, align with engineering, and report KPIs to senior leadership.

Lead cross-disciplinary teams to drive complex ASIC projects from kickoff through production. Manage schedules, suppliers, bring-up, qualification, and ramp-to-production while coordinating with internal and external partners to resolve issues and accelerate silicon deployment.

Develop and optimize DFT architectures for ASICs, performing validation, integration, and test pattern generation, while collaborating with cross-functional teams.

Develop next-generation ASICs for SpaceX's Starlink system, evaluate architectural trade-offs, and ensure design verification and integration with physical implementation teams.

Design, implement, and maintain AV systems for collaboration and event spaces. Collaborate with construction and design teams, support high-profile events (launches, concerts), and provide technical AV, lighting, and automation support and troubleshooting.

Develop next-generation silicon for SpaceX's Starlink initiative, performing physical implementation steps, improving methodologies, and collaborating with design teams.

The engineer will handle full-chip physical verification, including DRC, LVS, and ESD signoff, while optimizing design flows for advanced SoCs and engaging with foundry teams.

Lead digital ASIC verification at block and system level: write and execute test plans, develop test harnesses and regressions, close coverage, support pre-silicon verification, chip bring-up and post-silicon validation, and collaborate with cross-disciplinary teams to verify complex digital designs.

Develop and execute digital ASIC verification at block and system level. Build SystemVerilog (UVM and non-UVM) testbenches, write test plans, run regressions, close coverage, automate test generation with Python and MATLAB, and support pre-silicon verification through post-silicon validation and chip bring-up.

Develop and verify Design for Test (DFT) infrastructure for ASIC/SoC designs: evaluate scan insertion readiness, integrate and verify DFT IP, run ATPG and gate-level simulations, create post-silicon ATPG content, and collaborate with physical design and manufacturing teams to ensure high scan coverage and testability in silicon.