Top Engineering Jobs in Austin, TX

Build and improve DevOps infrastructure for hardware validation and ASIC/SoC bring-up. The role focuses on reducing manual setup and configuration drift, improving regression predictability, qualifying tools and releases, enabling scalable experimentation and AI-assisted validation, and providing automation and self-service tooling that increases validation engineer productivity.

Leads Ericsson’s Austin System Virtual Platform team, setting technical direction for SystemC and TLM hardware models, simulation accuracy, performance, CI integration, releases, and supplier deliveries. Acts as an operative product owner, translating stakeholder needs into platform priorities and managing the release train. Collaborates with architecture and software teams while recruiting, developing, and managing the Austin engineering team.

Develop and integrate SystemC/C++ transaction-level models for virtual SoCs and pre-silicon software development. Design test environments, define coverage metrics, perform hardware/software co-simulation and system debugging, and support RTL verification. Collaborate with architects, IP teams, EDA partners, and distributed engineering groups while maintaining simulation infrastructure. The role also involves embedded software, emulation, ASIC development, continuous integration, technical communication, and potentially mentoring other engineers.

Develop and execute automated and regression tests for Ericsson gNodeB and Cloud RAN vDU software. Integrate, troubleshoot, and verify 5G/6G baseband features in laboratory environments; prepare test plans, document results, and analyze feature interactions. Collaborate with design and system engineers while testing wireless protocols, mobility, performance, robustness, configuration, capacity, and RF-related functionality across base stations, mobile devices, and simulators.

Designs and maintains scalable CI/CD pipelines and automation infrastructure for ASIC, SoC, and silicon development workflows. Integrates source control, code review platforms, EDA tools, automated testing, regression management, and quality gates. Improves engineering productivity, infrastructure reliability, resource utilization, and development standardization. Develops dashboards and analytics, and evaluates AI/ML solutions for workflow optimization, failure analysis, regression triage, debugging, and root-cause analysis. Collaborates with design, verification, IT, and infrastructure teams.

Design and verify complex ASIC, SoC, FPGA, and Layer 1 accelerator designs using SystemVerilog and UVM. Build reusable verification environments, drive functional and code coverage closure, validate interfaces and protocols, and debug RTL through post-silicon environments. Develop AI-assisted agentic workflows, CI/CD automation, and machine learning-guided verification processes using Python and related scripting tools. Mentor engineers and collaborate with architecture, RTL, emulation, and system teams.

Lead block- and top-level ASIC/IP verification: architect and build RTL testbenches using SystemVerilog/UVM, develop TLM behavioral models, run hardware emulation/acceleration and SW-driven verification, mentor team members, and define verification strategy and best practices for 5G ASIC IP.

The IP Verification Engineer will lead verification efforts for ASIC IP, build environments, mentor team members, and ensure designs meet specifications in 5G infrastructure.

Design and own microarchitecture and RTL for L1 accelerators, translating DSP/FEC algorithms into high-performance SystemVerilog. Deliver end-to-end IP including specification, RTL, synthesis, timing closure, and hand-off. Lead verification, backend/physical design collaboration, and optimize power/area/throughput across major blocks.

Develop and execute ASIC and IP verification across block and top levels. Build UVM testbenches, TLM models, test plans, and randomized or directed tests; perform RTL debug and coverage closure; and verify hardware with embedded software. The role requires SystemVerilog, UVM, scripting, Linux/Git-based development, and familiarity with interfaces, computer architecture, and relevant semiconductor IP. This is a hybrid, non-remote position in Austin, Texas.