Top Engineering Jobs in Austin, TX

Lead sub-system level verification of high-speed IOs (PCIe/CXL) including test plan creation, SystemVerilog/Verilog/UVM testbench and test development, simulation and emulation, performance and interoperability verification, debugging failures, improving verification methodology, and mentoring junior engineers while collaborating with architects, RTL designers, and cross-functional teams.

The role involves managing safety and cybersecurity for automotive SoC programs, ensuring compliance with standards, and improving development processes.

Define and analyze SoC system performance requirements, engage with teams to optimize performance, and drive technology roadmaps for compute infrastructure.

The Architect will improve Arm's hardware acceleration infrastructure through benchmarking, scheduling optimization, vendor API integration, and performance visualization, enhancing overall productivity.

Lead a global Project Enablement and Engineering Operations organization to define strategy, operating model, and governance for semiconductor project startups. Ensure operational readiness, engineering infrastructure, IP governance, export compliance, and vendor enablement. Build scalable processes, drive automation and analytics, partner cross-functionally, track KPIs, and influence senior stakeholders to improve engineering efficiency and compliance.

Lead a global team to define and deliver SoC-level clock, reset, power, and thermal architectures. Drive requirements gathering, prototyping, implementation, verification, and post-silicon bring-up while coordinating OEMs and software partners to ensure power-efficient, high-quality SoC products.

The role requires designing, building, and operating a secure OpenStack private cloud environment, focusing on Infrastructure as Code and automation to support scalable engineering workloads.

Analyze data-path RTL and algorithms, build abstract C models, prove RTL–C equivalence with SLEC, and formally verify models against architectural specs using ACL2. Improve verification infrastructure, interfaces, and apply interactive theorem proving across Arm projects while collaborating with designers and verification engineers.

Design and integrate SoC subsystems (PCIe, DDR/LPDDR, HBM, UCIe, Ethernet); author micro-architecture specs; develop RTL in Verilog; perform static checks (CDC, RDC, X-Propagation, linting); collaborate with verification, performance analysis, and backend teams for floorplanning and timing closure; improve design methodologies and mentor team members while supporting project management.

The Senior/Staff Design Verification Engineer will be responsible for design verification in coherent interconnects. Specific responsibilities are not detailed, but expertise in this area is expected.