Jobs at Ambiq

Lead and scale the physical implementation organization for ultra-low-power MCU products. Define strategy, build and mentor teams, oversee full-chip and block-level physical design (floorplanning, power planning, CTS, P&R, timing closure, DRC/LVS, EM/IR signoff), collaborate cross-functionally, manage schedules and tape-out readiness, and ensure first-silicon success and manufacturability.

The Sr. Director of Front End Engineering will drive innovation in semiconductor solutions, oversee engineering teams, and ensure project success with customer-centric solutions.

Own end-to-end digital design verification for complex SoCs at block, subsystem, and full-chip levels. Develop UVM/SystemVerilog testbenches, verification plans, constrained-random and directed tests, scoreboards, coverage models, and C/C++ SoC validation libraries. Automate regressions and reporting, debug failures, perform root-cause analysis, and collaborate with architecture, design, and software teams. The role requires managing verification milestones, risks, and deliverables through multiple successful tape-outs.

The Senior Staff SoC Power and Performance Architect role focuses on advancing ultra-low-power semiconductor solutions for AI edge, wearable, medical device, and IoT applications. The position is based onsite five days per week in Austin and appears intended to lead SoC power and performance architecture in collaboration with cross-functional engineering and product teams. Detailed responsibilities and qualifications were not provided in the posting.

Lead and scale Ambiq's silicon validation organization, define post-silicon validation strategy and automation, drive bring-up, characterization, debug, and production correlation, build global teams and lab infrastructure, manage priorities across concurrent programs, and provide technical leadership for complex silicon issues and customer escalations.

Lead software architecture for low-power Edge AI MCUs: define requirements, perform functional allocation, prototype, guide implementation and testing, optimize performance/power, enforce standards, and mentor engineers.

The Head of Investor Relations leads the global IR program for a semiconductor company, managing investor communications, strategic positioning, earnings processes, and relationships with the investment community to enhance credibility and investor understanding.

Lead DFT strategy for ultra-low-power SoCs: design and implement scan, boundary scan, MBIST, ATPG and low-power DFT architectures; generate and analyze structural test vectors; run pre/post-layout simulations; collaborate with design, verification, and test teams to optimize coverage, test time, cost, and bring-up test vectors on silicon.

Lead enterprise AI enablement by identifying high-value AI opportunities, redesigning workflows, building business cases, running pilots, driving adoption, establishing governance and metrics, and building organizational AI literacy to improve engineering productivity and business outcomes.

Architect and implement SoC/MCU RTL (Verilog/SystemVerilog), own complex blocks from spec through tapeout, integrate IP and ARM subsystems, collaborate with verification and physical design, resolve LINT/CDC/RDC issues, support FPGA prototyping and silicon bring-up, and mentor junior engineers.

Lead post-silicon validation and optimization of BLE and other wireless radio subsystems. Define validation methodologies, build automation and firmware for RF/PHY characterization, design RF lab hardware/infrastructure, execute RF performance and power tests, debug system-level issues, and mentor engineers to improve wireless performance and production correlation.

Lead post-silicon power validation, characterization, and optimization for ultra-low-power mixed-signal SoCs. Develop validation methodologies, automation frameworks, firmware, and hardware for precision power measurement. Analyze power across modes and workloads, collaborate with cross-functional teams to resolve silicon issues, and mentor engineers while delivering scalable validation infrastructure and lab automation.

The Principal Edge AI Firmware Engineer will develop and optimize embedded software for AI applications, focusing on performance and energy efficiency. Responsibilities include enhancing AI runtimes, profiling tools, and ensuring customer integration across embedded environments.

Develop and support Ambiq's Trusted Execution Environment and related security implementations for embedded systems, ensuring compliance with security standards and seamless integration with customer builds.

The Sr Director of System Architecture leads the development of ultra-low-power, AI-based SoC architectures and coordinates teams to drive specifications, power/performance analysis, and integration into products.

The Principal Engineer - RTL will oversee pre-tape out quality for digital SoC modules, lead architecture and micro-architecture development, and manage RTL development. Responsibilities include IP integration, collaboration with verification teams, and assisting in silicon validation.

Define and develop ultra-low-power imaging, ISP, video, and computer vision architectures for Ambiq SoCs. Create architecture specs, power/performance models, and system flows; drive camera image quality strategy; evaluate/integrate imaging and AI IP; define APIs and HALs; collaborate across FPGA, design, verification, and product teams; support customer engagements and contribute to product roadmaps.

Lead end-to-end digital verification for complex SoCs, developing UVM/SystemVerilog testbenches, SoC-level C/C++ tests, automation, coverage goals, debugging, and collaborate with design teams to ensure production-ready silicon.

Lead and build Ambiq's legal function post-IPO: set legal strategy and governance, manage IP and technology transactions, oversee compliance (export controls, data privacy, labor), direct securities and M&A work, advise on employment and compensation, manage outside counsel, and shape litigation and regulatory strategy across global jurisdictions.

Lead planning, scheduling, and execution of embedded software programs across pre-silicon to production for AmbiqSuite SDK. Develop integrated project plans, track cross-functional dependencies and risks, drive communication and escalation, monitor quality metrics, and produce executive dashboards. Coordinate with architecture, RTL, verification, validation, applications engineering, and product teams to support releases and product launches.