The Principal Engineer - RTL will oversee pre-tape out quality for digital SoC modules, lead architecture and micro-architecture development, and manage RTL development. Responsibilities include IP integration, collaboration with verification teams, and assisting in silicon validation.

Responsible for verifying digital and mixed-signal designs including systems-on-chip, developing test plans, automating testing, and collaborating with various teams to ensure design verification for low-power applications.

Lead the development of embedded software platforms for ARM Cortex-M MCUs, ensuring high-quality releases, mentoring teams, and driving cross-functional alignment.

The Office Operations Manager oversees daily office operations, ensuring a well-functioning workspace, manages office logistics, engages employees, and coordinates events while supporting the HR team.

Design, implement, and optimize Ambiq's embedded AI runtimes and operator libraries for on-device inference. Build profiling, benchmarking, and regression tests; optimize latency, memory, and energy on constrained hardware; support customer integrations across bare metal and RTOS toolchains; and maintain docs, tooling, and upstream/fork health.

The role involves building and optimizing embedded AI runtimes, implementing ML operator kernels, and improving performance for on-device AI in resource-constrained environments.

The Sr. Director of Front End Engineering will drive innovation in semiconductor solutions, oversee engineering teams, and ensure project success with customer-centric solutions.

The Principal Embedded Software Architect will design the software architecture for low-power Edge AI MCUs, leading decisions for functionality and performance, partnering with hardware teams, and mentoring engineers.

Lead the development of the GPU software stack for Ambiq's MCU platforms, defining GPU HAL, implementing graphics APIs, and conducting silicon bring-up.

The Staff Software Engineer, Dev-Ops will manage SDK release cycles, maintain Jenkins jobs, improve build systems, and debug hardware/software issues while collaborating across teams.

Lead design and implementation of HAL, device drivers, RTOS ports, and test cases for NPU, DMA/DME, and memory subsystems. Support pre-/post-silicon bring-up, verification, performance optimization, debugging, and cross-team/customer support.

Design, train, optimize, and deploy efficient on-device ML models (audio and vision) for resource-constrained products; maintain Ambiq ADKs; port and optimize customer models; apply model-efficiency techniques; produce customer-facing demos, docs, and benchmarks.

Lead development and testing of Ambiq's embedded graphics SDK and GPU HAL for MCU platforms. Design, implement, and maintain graphics APIs, GPU and display HALs; develop example apps and tests; perform pre-silicon FPGA verification, post-silicon bring-up, system validation, and hands-on debugging; support DV, field engineers, and customers.

Lead and scale the physical implementation organization for ultra-low-power MCU products. Define strategy, build and mentor teams, oversee full-chip and block-level physical design (floorplanning, power planning, CTS, P&R, timing closure, DRC/LVS, EM/IR signoff), collaborate cross-functionally, manage schedules and tape-out readiness, and ensure first-silicon success and manufacturability.

Own Ambiq's SEC and external reporting (10-K, 10-Q, 8-K), lead technical accounting for U.S. GAAP matters, manage SOX controls, coordinate foreign statutory filings, and support global tax coordination and disclosures.

Lead timing methodology and closure for block and SoC levels in modern FinFET/multi-patterning processes. Define flows, constraints, signoff correlation, timing margining, glitch noise analysis, and collaborate with RTL, PnR, DFT, and post-silicon teams to achieve timing convergence and best-in-class PPA.

Lead transistor-level analog IC design from specification through layout, verification, prototype testing and production support. Define chip/block specs, architect circuits, supervise layout, run design reviews, interface with digital designers, develop manufacturing test plans, and support product, marketing, and applications engineering.

Lead software architecture for low-power Edge AI MCUs: define requirements, perform functional allocation, prototype, guide implementation and testing, optimize performance/power, enforce standards, and mentor engineers.