Jobs at Ambiq

Leads architecture, specification, transistor-level design, verification, layout supervision, validation, and production release of complex analog and mixed-signal IC subsystems. The role addresses power management, clocking, data conversion, advanced-node design, manufacturing test, and post-silicon characterization. It also guides senior engineers, leads technical reviews, resolves cross-functional issues, and supports product development and customer problem resolution.

Own revenue and product margin planning, forecasting, and budget-to-actual analysis for semiconductor products and manufacturing operations. Build financial models and R&D investment business cases, including ROI, payback, and sensitivity analyses. Partner with Sales, Marketing, R&D, Manufacturing, Operations, Accounting, and executives to optimize margins, prioritize investments, explain financial performance, and support investor relations. The role includes periodic travel to Taiwan and occasional late-night calls.

Lead system architecture for next-generation ultra-low-power AI SoCs from concept through production. Define processor, memory, interconnect, clocking, power, accelerator, and hardware/software partitioning strategies while managing power, performance, and area tradeoffs. Develop architecture specifications and models, evaluate IP, guide silicon implementation and validation, collaborate with customers and cross-functional engineering teams, and mentor architecture staff.

Responsible for post-silicon validation and characterization of analog and mixed-signal SoC subsystems. Develop validation plans, automate testing and data analysis, characterize silicon across process, voltage, and temperature, analyze performance, correlate results with simulation and production data, and debug analog, digital, firmware, power, and board-level interactions. The role also supports validation hardware, lab infrastructure, test coverage, yield improvement, and production readiness.

Designs and develops PCB-based evaluation hardware for low-power, ARM-based SoCs. Responsibilities include hardware architecture, schematic and layout design, system bring-up, lab debugging, manufacturing test development, customer hardware reviews, issue resolution, embedded software support, and creation of application notes and hardware design guidelines.

Own end-to-end digital design verification for complex SoCs at block, subsystem, and full-chip levels. Develop UVM/SystemVerilog testbenches, verification plans, constrained-random and directed tests, scoreboards, coverage models, and C/C++ SoC validation libraries. Automate regressions and reporting, debug failures, perform root-cause analysis, and collaborate with architecture, design, and software teams. The role requires managing verification milestones, risks, and deliverables through multiple successful tape-outs.

The Senior Staff SoC Power and Performance Architect role focuses on advancing ultra-low-power semiconductor solutions for AI edge, wearable, medical device, and IoT applications. The position is based onsite five days per week in Austin and appears intended to lead SoC power and performance architecture in collaboration with cross-functional engineering and product teams. Detailed responsibilities and qualifications were not provided in the posting.

Lead and scale Ambiq's silicon validation organization, define post-silicon validation strategy and automation, drive bring-up, characterization, debug, and production correlation, build global teams and lab infrastructure, manage priorities across concurrent programs, and provide technical leadership for complex silicon issues and customer escalations.

Lead software architecture for low-power Edge AI MCUs: define requirements, perform functional allocation, prototype, guide implementation and testing, optimize performance/power, enforce standards, and mentor engineers.

Lead enterprise AI enablement by identifying high-value AI opportunities, redesigning workflows, building business cases, running pilots, driving adoption, establishing governance and metrics, and building organizational AI literacy to improve engineering productivity and business outcomes.

Architect and implement SoC/MCU RTL (Verilog/SystemVerilog), own complex blocks from spec through tapeout, integrate IP and ARM subsystems, collaborate with verification and physical design, resolve LINT/CDC/RDC issues, support FPGA prototyping and silicon bring-up, and mentor junior engineers.

Lead post-silicon validation and optimization of BLE and other wireless radio subsystems. Define validation methodologies, build automation and firmware for RF/PHY characterization, design RF lab hardware/infrastructure, execute RF performance and power tests, debug system-level issues, and mentor engineers to improve wireless performance and production correlation.

Lead post-silicon power validation, characterization, and optimization for ultra-low-power mixed-signal SoCs. Develop validation methodologies, automation frameworks, firmware, and hardware for precision power measurement. Analyze power across modes and workloads, collaborate with cross-functional teams to resolve silicon issues, and mentor engineers while delivering scalable validation infrastructure and lab automation.

The Principal Edge AI Firmware Engineer will develop and optimize embedded software for AI applications, focusing on performance and energy efficiency. Responsibilities include enhancing AI runtimes, profiling tools, and ensuring customer integration across embedded environments.

Develop and support Ambiq's Trusted Execution Environment and related security implementations for embedded systems, ensuring compliance with security standards and seamless integration with customer builds.

The Sr Director of System Architecture leads the development of ultra-low-power, AI-based SoC architectures and coordinates teams to drive specifications, power/performance analysis, and integration into products.

The Principal Engineer - RTL will oversee pre-tape out quality for digital SoC modules, lead architecture and micro-architecture development, and manage RTL development. Responsibilities include IP integration, collaboration with verification teams, and assisting in silicon validation.

Lead end-to-end digital verification for complex SoCs, developing UVM/SystemVerilog testbenches, SoC-level C/C++ tests, automation, coverage goals, debugging, and collaborate with design teams to ensure production-ready silicon.

Lead development, testing, and maintenance of Ambiq's Zephyr software offering: port SoCs, enable hardware platforms, build drivers and samples, manage CI/CD and issue resolution, optimize for ultra-low power, create application notes, and support field/customers.

Lead Americas sales P&L and GTM across wearables, IoT, healthcare, and consumer electronics. Build and scale a regional sales organization, drive strategic OEM/ODM partnerships, manage channel and distribution, align cross-functionally to accelerate design wins, and deliver revenue against annual targets.