Articles about Ericsson

Designs, verifies, and implements DFX, DFT, and silicon lifecycle management capabilities across ASIC programs from specification through tape-out and field operation. Responsibilities include test strategy, SoC-level DFT planning, in-system testing, telemetry, diagnostics, repair, post-silicon debug, yield bring-up, automation, AI-enabled engineering workflows, and collaboration with physical design, test, EDA, and ASIC partner teams. The role also mentors junior engineers and improves scalable DFX methodologies.

The IP Verification Engineer will lead verification efforts for ASIC IP, build environments, mentor team members, and ensure designs meet specifications in 5G infrastructure.

The Principal AI Model Architect's role includes optimizing model architectures for new hardware, translating AI algorithms into hardware specifications, and projecting performance for silicon design.