Teams at IntelliPro Group Inc.

Design and develop digital and mixed-signal ASICs and FPGAs using HDL. Build verification methodologies, test benches, test plans, coverage models, and test harnesses. Perform timing, noise, physical design, and signoff analysis; troubleshoot implementation issues; and support lab integration. Collaborate with systems, firmware, architecture, and product engineering teams throughout the ASIC/FPGA lifecycle, while potentially mentoring junior engineers.

Senior Verification Engineer responsible for planning and executing verification across ASIC IP, subsystems, and SoCs. The role develops testbenches, reference models, scoreboards, monitors, assertions, coverage strategies, regression infrastructure, and CI systems. Responsibilities include simulation, formal analysis, directed testing, coverage closure, regression triage, sign-off readiness, and AI-assisted verification capabilities. The engineer will define methodology for a new satellite communications silicon program and mentor junior engineers.

Executes B2B billing operations, including invoice calculation, generation, delivery, and credit or debit memo processing. Reviews contracts and procedures to apply accurate billing terms, conducts peer reviews and reconciliations, responds to billing inquiries, escalates complex disputes, and supports month-end close and audit requests using Oracle and spreadsheet templates.