Jobs at Marvell Technology

The engineer will develop advanced microelectronic packages, focusing on electrical design, modeling, and characterization for high-speed interfaces, collaborating with various teams to ensure manufacturability and compliance.

Develop and maintain advanced place-and-route (P&R) flows for advanced nodes, deploy and support flows, integrate into the CAD platform, enable new technologies, interface with EDA vendors, and centralize P&R methodology and knowledge across design teams.

Lead development and maintenance of P&R flows and add-on CAD tools for advanced-node SoC designs. Deploy and support flows, integrate with CAD platform, debug timing/floorplan/power issues, interface with EDA vendors, and innovate solutions for design challenges while keeping up with process and tool evolution.

Drive development, deployment, and support of ASIC CAD flow and infrastructure. Build and maintain automation frameworks, flow orchestration, dashboards, and analytics. Integrate standard-cell libraries, memory macros and IP across flows. Define synthesis and physical implementation best practices and collaborate with Design, Physical Design, and IT to improve productivity and quality.

Manage daily facility operations, remote monitoring, vendor/contract relationships, budgets, safety compliance, and facility projects for distributed sites while ensuring strong workplace experience and stakeholder communication.

The role involves drafting, reviewing, and managing commercial agreements, supporting legal teams, and utilizing technology for contract administration and reporting.

Lead implementation of DFT/Test for complex ASIC/SoC and chiplet designs using Tessent and related EDA tools. Define DFT architecture, run insertion flows, generate patterns, support STA constraints, and drive post-silicon bring-up and debug. Mentor a small DFT team and enhance methodologies and tools across multi-die custom compute designs.

Lead product management for custom hyperscale silicon targeting AI/data center customers. Own roadmap, customer engagement from exploration to volume production, market and competitive analysis, business planning, collateral, cross-functional execution, and drive design wins with hyperscalers and global sales.

Support Marvell's global export compliance program with product, software, and technology classification under U.S. and international export and customs regulations. Manage visitor and deemed export processes, support trade due diligence, maintain SOPs and training, prepare classification requests and license applications, and collaborate with engineering, operations, and global teams on compliance projects.

Design and develop high-speed IC packages focusing on signal and power integrity. Perform electrical design, 2D/3D EM modeling, measurements (VNA/TDR), and package/PCB characterization. Interface with suppliers, IC designers, and cross-functional teams to ensure manufacturability, reliability, and cost targets. Automate SI/PI workflows and contribute to new package technology development.

Lead advanced packaging technology roadmap and development for high-performance AI/HPC and networking products. Define package architecture, chiplet topology, PDN and thermal strategies; run signal/power integrity and EM simulations; partner with silicon teams, OSATs and foundries; drive manufacturability, qualification, and volume readiness while creating IP and proof-of-concept technologies.

Lead the development of advanced packaging technology for HPC and AI solutions, focusing on architecture, integrity studies, and collaboration with external partners.

Lead the design verification team for ASIC development, ensuring high-quality product delivery through effective collaboration and innovative methodologies.

Provide legal support for complex technology collaborations, licensing, co-development, supply, and commercial agreements with hyperscalers and strategic partners. Counsel senior management and cross-functional teams on IP, data rights, exclusivity, and risk allocation; negotiate high-value transactions; improve contract templates and processes; mentor junior counsel; leverage AI tools for contract efficiency; and manage special projects as directed.

The role involves developing advanced packaging technologies, defining architectures, leading co-design efforts, and ensuring product manufacturability and reliability for high-performance computing and AI solutions.

The role involves architecting and implementing high-speed analog and mixed-signal circuits for photonic transceivers and electronic ICs, requiring collaboration with multidisciplinary teams.