Jobs at NXP Semiconductors

Early-career, customer-facing program preparing new graduates to support customers through evaluation, design, demos, and deployment of NXP semiconductor solutions. Collaborate with sales, product, and applications teams to translate requirements into system-level solutions, lead customer engagements, and develop technical depth toward TSE or FAE roles.

Design and implement cost-effective test methods for IP on advanced-node SOC microprocessors. Support characterization, qualification, production test, and debug; develop diagnostic programs; collaborate with design and verification teams pre-tapeout; understand high-speed ATE hardware and semiconductor manufacturing test economics.

Lead export control and sanctions compliance for the AMEC region, driving strategy implementation, regulatory adherence, and operational efficiency while engaging stakeholders and optimizing processes.

Design and deliver digital IP (RTL) for SoC components using Verilog/SystemVerilog; plan documentation and schedules; collaborate with verification to achieve full coverage; perform quality checks (Lint, CDC, STA); track metrics and support SoC integration, validation, and field issue resolution.

Develop and execute IP verification plans using SystemVerilog/UVM and SVA. Create random and directed tests, implement monitors/drivers/checkers, debug failures, collect/analyze coverage, and perform assertion-based formal verification. Maintain verification environments, scripts, and Makefiles while collaborating with architecture, design, and verification teams to ensure IP quality.

Lead development and execution of verification plans and testbenches for MCU/MPU digital IP. Build UVM/OVM components, constrained-random stimulus, SVA assertions, formal checks, coverage models, and debug failures. Provide technical leadership, mentor engineers, and collaborate with global SoC/IP teams to drive best practices.

Lead development and execution of verification plans and testbenches for digital IP. Create UVM/OVM testbench components, constrained-random and directed tests, SVA assertions, functional coverage models, and apply formal methods. Debug RTL, analyze coverage results, mentor engineers, and collaborate with global SoC/IP teams to drive zero-defect quality and productivity improvements.

Design and verify DFT features at subsystem and top levels: insert and verify MBIST, analyze/fix scan DRCs, run ATPG coverage and pattern generation, insert TAP/IO/test pinmux, perform power-aware RTL/GLS simulations, and support pattern bring-up with product and test teams.

Define and implement IP/subsystem-level verification strategy. Write SystemVerilog/UVM testbenches, assertions, random and directed tests. Perform simulation, debug failures, collect/analyze coverage, and run assertion-based formal verification. Develop verification infrastructure, scripts, and use AI to augment productivity.

Lead verification for MCU/MPU digital IP: define and execute verification plans, build UVM-based testbenches and SVA, develop constrained-random and directed tests, apply formal methods, debug failures, analyze RTL and coverage, and mentor a small team to ensure zero-defect delivery.

Lead global brand and internal storytelling for NXP by translating complex edge technologies into clear, scalable narratives and content platforms. Develop strategic content for campaigns, manage corporate content on nxp.com, reimagine formats, ensure cross-channel consistency, and run the global internal newsletter. Collaborate with Brand, Digital, Strategy, Business Lines, and agencies to deliver high-quality, differentiated content and maintain a coherent content ecosystem.

The Director, Global HR Business Partner engages with senior leaders to align people strategies with business objectives, influencing decisions through data and strategic insights while ensuring innovative talent management practices.

Define and develop graphics and display controller IP architectures from specification through modeling and implementation. Perform architecture modeling, performance estimation and analysis, identify tradeoffs, engage standards bodies, and collaborate across teams to drive design development and differentiation.

The Senior Counsel will lead contract negotiations, advise on sales agreements and software licensing, and support global business operations.

Lead cross-functional execution of Automotive ASIL-B/D and data center SoCs from definition through post-silicon productization. Drive architecture decisions, coordinate IP/technology/packaging partners, resolve handoffs across frontend, verification, AMS, DFT, emulation, physical implementation, and validation, create project plans, mentor engineers, and ensure high quality, reliability, and timely delivery under resource and schedule constraints.

The Senior Director of Functional Safety leads a large team to ensure functional safety in product development, driving strategy, development, and customer support, while fostering collaboration across NXP's global offices.

Manage and maintain NXP's IT general control environment and perform IT compliance assessments (SOX, NIS2, NIST frameworks, AI, ESG). Coach control owners, design remediation plans, test control effectiveness, liaise with auditors, and support IT teams and vendors to ensure compliance across projects and SaaS implementations.

Lead Mass Market Technical Support for the Americas: manage and develop FAEs, align distributor technical enablement, drive design-in for microcontrollers/processors/connectivity/edge AI, collaborate cross-functionally to grow design wins, and recruit and train early-career engineers.

Lead product business planning for Wallet and UWB product lines, including market analysis, customer engagement, and go-to-market strategies. Drive marketing activities and collaborate across teams to enhance product positioning.

The role involves defining product roadmaps, collaborating with teams, preparing technical documentation, and providing support for IO aggregator solutions.