Jobs at Renesas Electronics

The Principal Digital Verification Engineer is responsible for verifying DDR5 Data Buffers, developing verification plans, creating reusable test environments, and leading a team in memory interface product verification for optimal performance and quality.

Own end-to-end product engineering for advanced semiconductor power modules from NPI through high-volume production. Ensure manufacturability, enforce assembly standards, lead yield analysis, root-cause investigations, qualification, and change management. Drive cross-functional alignment across Design, Test, Quality, and Manufacturing, support customer escalations, and optimize cost, yield, and cycle time at scale.

Senior technical authority defining and governing physical-design architecture and foundry strategy (TSMC) for MCU/SoC products. Leads AI initiatives to reduce MCU development cost, drives physical partitioning, PPA targets, IO and timing requirements, and aligns die-size and KPI goals with system architects and chip leads.

Own the full product lifecycle for power stage products: define strategy and roadmap, conduct market and competitive analysis, drive cross-functional product development, align engineering with market requirements, and lead go-to-market, pricing, and customer documentation for data center and AI compute markets.

Lead end-to-end delivery of derivative SoCs by combining RTL design, functional verification, and physical implementation. Build an AI-augmented silicon factory to predict physical outcomes during RTL coding, automate derivative generation and verification, and accelerate physical closure by reusing placement/routing and ML-driven optimizations.

Design and optimize high-performance 12V–80V switching power MOSFETs across full product lifecycle. Use TCAD simulations, develop device structures and process flows, collaborate with fab/process engineers and IC teams, create test/characterization methods, execute layouts, and support product yield and reliability.

Lead design, verification, test, and validation of power-management mixed-signal SoCs from definition through production. Drive cross-functional collaboration, perform root cause analysis on field issues, contribute to system architecture, mentor junior engineers, and improve verification and validation methodologies.

The Senior Principal System Engineer will lead customer interactions, define product specifications for Power ICs, mentor junior engineers, and ensure timely project deliveries while addressing technical challenges across engineering teams.

The Principal NPU Architect will define and implement high-performance Neural Processing Units, overseeing architecture, simulation, integration, and hardware-software co-design for AI applications, and lead through different design phases.

Lead the development of DDR5 and DDR6 PHY solutions for advanced SoCs, managing a team and overseeing project execution from design to silicon bring-up.

Translate system-level power requirements into product and design specifications for high-performance voltage-regulation solutions. Work with customers, IC design, firmware, validation, and marketing to define architecture, evaluate trade-offs, produce technical documentation, and support system analysis and modeling for processor, GPU, ASIC, and datacenter power applications.

Lead end-to-end execution of strategic customer programs for hyperscaler accounts: manage scope, schedules, NPI, engineering samples, volume ramps, supply coordination, cross-functional alignment, dashboards, risk mitigation, and customer/internal program reviews.

Lead and scale product management for High-Performance AI and Compute power solutions. Own product strategy, roadmap, portfolio economics, and NPD funnel. Build and manage a global PM team, establish processes, KPIs, and go-to-market frameworks. Align cross-functionally with engineering, marketing, and sales, present to executives, and drive revenue growth and operational excellence.

Senior technical contributor supporting power management solutions for infrastructure/AI servers: debug and validate digital multiphase products at customer sites, support system validation and development teams, create datasheets and application notes, enable marketing and train other AEs/FAEs, and assist system-level design and verification for digitally enabled power products.

Lead design-in and customer support for Renesas DC-DC and multiphase power solutions: perform schematic and PCB reviews, simulate and debug converters, author application notes, train FAEs, support on-site/remote customer engineering, and inform product definition through system-level analysis and market research.

Lead cross-functional capacity expansion and cost-reduction programs across product design, manufacturing, test, packaging, sourcing and operations. Identify BOM and process savings, coordinate stakeholders, track savings and risks, support supplier/customer engagements, and drive PCN/EOL and execution to meet targets.

Own end-to-end product engineering for advanced power modules from NPI through high-volume production and sustaining. Drive manufacturability, assembly standards (IPC-A-610), yield analysis, qualification, product change management, and cross-functional resolution of production issues to meet performance, quality, cost, and schedule targets.

Lead global test and product engineering for power semiconductors, owning product lifecycle from silicon bring-up through high-volume manufacturing. Drive yield ramp, test development (wafer sort, final test, ATE), cost and cycle-time optimization, excursion resolution, cross-functional alignment, and organizational growth including budgeting and headcount planning.

Lead architecture and design of embedded firmware for UALink switch ASICs, spanning hardware-software co-design, protocol and transport implementation, link initialization and topology discovery, SDK/API exposure to BMCs (OpenBMC/Redfish), performance optimization for low-latency collective primitives, advanced RAS features, and firmware security including secure boot and runtime attestation.

Lead design, production release, and continuous improvement of ATE hardware (loadboards, probe cards, sockets, change kits). Manage vendor relationships, review schematics/layout/BOMs, support first-article builds and debug, maintain inventory and coordinate shipments to meet NPI timelines.