Jobs at Renesas Electronics

Design, develop, debug, test, and maintain customer-facing software for semiconductor SoC products. Collaborate with customers, application engineers, hardware, firmware, systems, and marketing teams to define requirements, troubleshoot failures, and deliver software solutions. Contribute across Java, Kotlin, Python, TypeScript, and React projects, participate in code reviews, and apply software architecture, behavior-driven development, and unit-testing principles.

Support pre-silicon verification of embedded firmware for power management ICs. Develop and maintain ARM Cortex-M simulation tests, execute regressions, analyze logs and waveforms, create directed tests, automate workflows with scripts, isolate firmware and hardware-model issues, and document findings. Gain practical experience with embedded systems, verification, debugging, coverage, and firmware-hardware validation.

Supports evaluation, design-in, validation, characterization, and qualification of digital multi-phase DC-DC power converter products. Performs hands-on lab testing, power delivery debugging, PDN and converter simulations, technical documentation, schematic reviews, and PCB layout reviews. Collaborates with internal teams and customers to resolve issues and support deployment of power management solutions for server and infrastructure processor applications.

Implements digital islands within analog chips using ASIC physical design methods including floorplanning, placement, clock tree synthesis, routing, and physical verification. Performs power integrity analysis across multiple voltage domains, optimizing designs for performance, reliability, and manufacturability. Collaborates with analog designers, verification engineers, and global cross-functional teams in mixed-signal environments.

Develop and validate digital multiphase power controllers and Smart Power Stages for AI and cloud infrastructure. Responsibilities include DC/DC converter modeling with SIMPLIS or MATLAB, FPGA and microcontroller algorithm evaluation, evaluation board development, component selection, PCB layout, thermal design, automated laboratory testing, and preparation of technical collateral. The role requires expertise in power electronics, multiphase buck converters, control-loop theory, embedded programming, Verilog, and laboratory instrumentation.

Define next-generation voltage-regulation products by translating customer and system-level power requirements into product specifications, engineering requirements, use cases, and interface documentation. Collaborate with IC design, systems, firmware, validation, marketing, applications, and customer teams to evaluate architectures, technical trade-offs, features, and schedules. Support system analysis, modeling, and evaluation for high-performance CPU, GPU, ASIC, server, datacenter, and cloud platforms.

Leads a global technical program management organization delivering semiconductor package engineering and AI/datacenter power NPI programs. Responsibilities include program governance, milestone and critical-path management, risk mitigation, technical task forces, qualification and production readiness, OSAT/CM execution, issue resolution, executive reporting, and global TPM team development. Requires extensive semiconductor packaging, manufacturing, reliability, and cross-functional leadership experience.

Leads and scales a global application engineering organization supporting AI and high-performance computing customers. Owns recruiting, talent development, customer technical engagements, reference designs, technical escalations, automation, and feedback into product roadmaps. Requires deep datacenter and server power delivery expertise, executive-level customer communication, cross-functional influence, and substantial experience in power electronics or power management semiconductors.

Leads advanced semiconductor package architecture, design, simulation, qualification, and integration from concept through high-volume production. Oversees packaging technologies, layout, materials, assembly flows, reliability testing, OSAT and supplier strategy, yield improvement, and issue resolution. Collaborates across design, manufacturing, quality, reliability, and applications teams while providing technical leadership and mentoring. Requires deep expertise in thermal, mechanical, electrical, and reliability analysis for advanced and power semiconductor packaging.

Leads power management product adoption, design-in support, power tree architecture, hardware reviews, circuit simulations, customer debugging, and technical training. Defines product requirements, develops application documentation, performs competitive research, and supports next-generation DC-DC and multiphase power solutions. Requires advanced expertise in power converters, control theory, PCB design, simulation tools, lab equipment, and customer engineering support.

Leads package technology development, new product introduction, R&D, roadmap execution, and global OSAT management for power semiconductor packaging. Designs and qualifies power SiP, modules, wafer-level, flip-chip, and wide-bandgap packages; selects materials and manufacturing partners; optimizes processes through DOE; establishes production controls; resolves integration and quality issues; supports production ramp, customer adoption, and complaint resolution; and maintains package design rules and technical expertise.

Owns FPGA-based emulation and prototyping platforms for mixed-signal power ASICs. Responsibilities include adapting ASIC RTL for FPGA, mapping designs to FPGA resources, achieving real-time performance, modeling analog and power stages, developing debug visibility, automating implementation flows, and enabling firmware co-development. Provides technical leadership through mentoring, design reviews, methodology development, and cross-team architecture decisions.

Leads digital verification for DDR5, DDR6, and future memory interface products. Defines verification strategies and plans, develops reusable UVM testbenches, creates tests, checkers, and coverage, and verifies system- and block-level functionality and performance. Partners with design teams to ensure testability, drives process improvements, monitors quality and coverage, provides technical guidance to verification engineers, and reports progress to management.

Lead semiconductor product engineering across silicon bring-up, characterization, qualification, production release, and sustaining. Resolve complex product, test, manufacturing, yield, reliability, and customer issues; optimize test coverage, efficiency, quality, and cost. Analyze yield and reliability data, coordinate cross-functional teams, influence design and manufacturing decisions, and mentor junior engineers. The role focuses on power semiconductor products and requires extensive experience with ATE, silicon characterization, and production environments.

Leads solutions marketing for Renesas industrial automation offerings, engaging strategic customers to identify requirements, secure design wins, and drive revenue. Coordinates Sales, FAEs, product groups, channel marketing, and system architects to develop strategic engagement plans. Researches market dynamics and competition, influences product roadmaps, develops customer presentations and marketing collateral, and delivers field training. Builds relationships with technical and procurement stakeholders while promoting application-level solutions across PLCs, edge sensing, motor control, and HMI interfaces.

Leads application engineering for digital power management ICs, translating customer and market needs into product requirements and business plans. Supports technical marketing, customer visits, competitive analysis, FPGA prototyping, validation planning, ASIC supplier alignment, and resolution of design-performance conflicts. Provides advanced technical support and training while developing intellectual property. Requires deep expertise in multiphase power systems, digitally enabled power products, mixed-signal ICs, control loops, firmware-enabled systems, data-center CPUs/GPUs, and automated laboratory testing.

Owns product strategy, roadmap, lifecycle, market positioning, and go-to-market execution for high-performance power management products serving AI, data center, server, telecom, networking, and computing markets. Develops business cases, market requirements, pricing, sales collateral, technical documentation, and training materials. Partners with engineering, product management, sales, and global teams to deliver differentiated semiconductor products and translate complex technical concepts into compelling customer communications.

Own the full lifecycle of digital multiphase power products, including strategy, roadmap, market analysis, requirements, development, pricing, launches, sales enablement, and documentation. Lead cross-functional engineering and commercial teams, translate customer and market needs into product direction, and drive revenue growth across AI, cloud, data center, server, networking, telecom, and computing markets.

Leads new product introduction and definition for next-generation AI power modules, coordinating electrical, mechanical, software, systems, packaging, quality, and manufacturing teams. Defines product scope and requirements, manages engineering samples, oversees NPI gates and readiness reviews, evaluates materials, supports prototyping and production transition, and presents recommendations to senior stakeholders. Requires extensive product management or product definition experience in power electronics or infrastructure markets, plus power module engineering experience.

Serves as the senior technical authority for MCU physical design architecture, foundry engagement, technology selection, signoff requirements, and PPA targets. Defines physically realizable SoC architectures, partitioning, latency, pipeline, IO, and die-size plans. Leads TSMC technical collaboration and drives AI initiatives to reduce MCU development costs, including strategy, piloting, and implementation. Requires extensive physical design experience, multiple technology-node tapeouts, and MCU architecture familiarity.