Teams at SambaNova Systems

Define and own networking architecture for next-generation super-pod ML hardware. Lead R&D, specify high-performance networking fabrics, drive ML networking roadmap, collaborate cross-functionally across silicon, systems, and software, contribute to industry standards, and deliver performant, reliable, and secure interconnect solutions at scale.

The Principal Engineer will lead post-silicon validation and debugging of high-speed IO and memory subsystems, ensuring performance and reliability for AI compute platforms.

Responsible for post-silicon validation, debug, and validation of high-speed IO and memory subsystems to ensure reliable AI systems. Lead efforts in debugging, product validation, and development of tools for automation.