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Silicon Labs

Design Engineering Intern

Reposted 18 Days Ago
Be an Early Applicant
In-Office
Austin, TX
38-46 Hourly
Internship
In-Office
Austin, TX
38-46 Hourly
Internship
Contribute to the verification of ASIC IP blocks for wireless modem designs, applying Verilog and C programming to develop verification environments and assist in debugging issues.
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Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at www.silabs.com.

The Silicon Labs Summer Internship Program 

At Silicon Labs, our internship program offers students the opportunity to do meaningful, hands-on work that directly impacts the future of connected devices. As an intern, you’ll contribute to real projects, collaborate with world-class engineers, and gain exposure to the full product lifecycle, from research and design to testing and integration. Our program also includes professional development workshops, networking events, and mentorship to help you grow both technically and professionallyOur goal is to help you build on your skills, gain hands-on experience, and explore the potential of a future career with Silicon Labs.  Learn more about our Summer Internship Program. 

Meet the Team 

You’ll join the Modem Verification (IP Verification) team, which ensures the quality and reliability of Silicon Labs’ ASIC IP used in IoT applications. The team focuses on verifying complex digital designs for modem systems, applying advanced verification techniques to guarantee robust performance across real-world wireless scenarios. This critical work helps deliver low-power, high-performance solutions trusted across a wide range of connected devices. 

Responsibilities 

  • Contribute to the verification of ASIC IP blocks used in wireless modem designs for IoT applications. 

  • Apply Verilog or SystemVerilog to develop testbenches, simulations, and verification environments. 

  • Use C programming and scripting skills to support automated testing and verification flows. 

  • Assist in identifying and debugging design or verification issues in collaboration with senior engineers. 

  • Document results, share progress, and propose improvements to existing methodologies. 

Skills You Need 

Minimum Qualifications: 

  • Currently pursuing a Bachelors, Master’s, or PhD degree in Electrical Engineering, Computer Engineering, or a related field. 

  • Exposure to Verilog or SystemVerilog for digital design and verification. 

  • Proficiency in C programming and scripting (e.g., Python, Perl, or similar). 

  • Coursework in telecommunications basics, digital design, VLSI, or embedded programming. 

  • Hands-on project or lab experience in digital design verification or FPGA prototyping. 

The following qualifications will be considered a plus: 

  • Knowledge of UVM (Universal Verification Methodology). 

  • Exposure to AI through professional experience and/or academic research

  • Experience with verification debug techniques and tools.

  • Prior exposure to verification environments for digital communication systems. 

Perks and Program Offerings 

You can look forward to the following:     

  • Hybrid work schedule  

  • Free downtown parking  

  • Full access to onsite gym  

  • Free snacks and beverages  

  • Weekly Lunch and Learn sessions 

  • Weekly 1 x 1’s with your manager and mentor 

  • Weekly "Meet a Former Intern” coffee chats  

  • Monthly wellness offerings  

  • Monthly company updates with our CEO  

  • Inclusion in social events with various teams and Employee Resource Groups (ERGs) 

  • Participation in select L&D offerings  

  • Virtual events with global intern class  

  • End of summer presentation of your project during Intern Symposium 

 

The annualized base pay range for this role is expected to be between $79,040 ($38/HR) to $95,680 ($46/HR) USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant’s skill set. The base pay is just one component of the total compensation package for employeesOther components may include a sign on bonus. 

 

#LI-MA1 

#Hybrid 

Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.

Top Skills

AI
C Programming
Perl
Python
Systemverilog
Uvm
Verilog
HQ

Silicon Labs Austin, Texas, USA Office

400 W Cesar Chavez St, Austin, TX, United States, 78701

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