Broadcom Logo

Broadcom

Package Design Engineer

Reposted 17 Hours Ago
Be an Early Applicant
In-Office
River Hills, Austin, TX, USA
141K-226K Annually
Senior level
In-Office
River Hills, Austin, TX, USA
141K-226K Annually
Senior level
The role involves designing flip-chip-BGA packages for ASICs, collaborating on designs, managing projects, and improving processes.
The summary above was generated by AI

Please Note:

1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)

2. If you already have a Candidate Account, please Sign-In before you apply.

Job Description:

Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs.  You will be part of a worldwide R&D team developing high-performance package designs for ASICs for artificial intelligence (AI), networking, high-performance computing (HPC), and 5G base stations.  These designs include SerDes at 224G and higher, 5G RF/Microwave ADC/DAC, HBM, DDR5 and more.  You'll have the opportunity to collaborate with the team to create the package structures needed to enable new design, and contribute to efficiency improvements for our design team.

 

RESPONSIBILITIES:

  • Overall design responsibility for ASIC package designs, including aspects of signal integrity, power integrity, manufacturability, reliability, and thermal, in partnership with our experienced team of package engineering experts.
  • Package Design of critical structures for SerDes, ADC/DAC, DDR, etc.
  • Schedule, prioritize, & track your work across 2+ projects simultaneously
  • General flip-chip BGA package design & engineering
  • Project management and customer interface for your design projects
  • Contribute to efficiency improvements for the design team, through process development/improvement, automation, documentation, etc.
  • Physical design (layout) is a foundational responsibility in this role

 
EDUCATION/EXPERIENCE & REQUIREMENTS:

  • BSEE or similar field  and 12+ years’ experience in flip-chip-BGA package design, including high-speed SerDes or MSEE or similar field and 10+ years’ work experience
  • Knowledge of package-level signal integrity and power integrity, to apply to package designs
  • Cadence APD (allegro package designer) experience is preferred. Equivalent tool is OK.
  • Cooperate with our world-wide team (multiple time zones), including co-design with internal team members and external (Vendor) designers
  • Self-management and organization skills
  • Preferred candidates will also have 1 or more years experience with Cadence SKILL for Allegro, or similar design-automation coding experience and interest

OTHER REQUIREMENTS

  • This job requires working on-site at the Broadcom office, 5 days a week. This is not a remote-work position

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $141,300 - $226,000.

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Top Skills

Allegro Package Designer
Cadence Apd
Cadence Skill
Design Automation

Similar Jobs

Yesterday
In-Office or Remote
United States
Senior level
Senior level
Software
Design and validate high-speed packages, develop EDA tools and automation flows, model package structures, and ensure consistency in design processes.
Top Skills: 3Ds CstAdksAltium DesignerAnsys HfssCadenceCadence Allegro X ApdEda PlatformsEm SimulationKeysight AdsPower Integrity AnalysisPythonSiemens XpeditionSignal Integrity AnalysisSkillTcl
23 Days Ago
In-Office
Expert/Leader
Expert/Leader
Semiconductor • Manufacturing
The Principal Engineer will lead die-package co-design strategies, define package architecture, perform system-level analyses, and mentor junior engineers. The role emphasizes collaboration with various teams and customer engagement while staying current with semiconductor design trends.
Top Skills: AnsysCadenceHfssSynopsys
An Hour Ago
Remote or Hybrid
US
75K-99K Annually
Mid level
75K-99K Annually
Mid level
Information Technology
The Solutions Executive will manage ServiceNow products and services, develop sales strategies, enhance customer relationships, and achieve revenue goals.
Top Skills: Servicenow

What you need to know about the Austin Tech Scene

Austin has a diverse and thriving tech ecosystem thanks to home-grown companies like Dell and major campuses for IBM, AMD and Apple. The state’s flagship university, the University of Texas at Austin, is known for its engineering school, and the city is known for its annual South by Southwest tech and media conference. Austin’s tech scene spans many verticals, but it’s particularly known for hardware, including semiconductors, as well as AI, biotechnology and cloud computing. And its food and music scene, low taxes and favorable climate has made the city a destination for tech workers from across the country.

Key Facts About Austin Tech

  • Number of Tech Workers: 180,500; 13.7% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Dell, IBM, AMD, Apple, Alphabet
  • Key Industries: Artificial intelligence, hardware, cloud computing, software, healthtech
  • Funding Landscape: $4.5 billion in VC funding in 2024 (Pitchbook)
  • Notable Investors: Live Oak Ventures, Austin Ventures, Hinge Capital, Gigafund, KdT Ventures, Next Coast Ventures, Silverton Partners
  • Research Centers and Universities: University of Texas, Southwestern University, Texas State University, Center for Complex Quantum Systems, Oden Institute for Computational Engineering and Sciences, Texas Advanced Computing Center

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account