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Etched

Physical Design Engineer

Posted 5 Days Ago
Be an Early Applicant
In-Office
Austin, TX, USA
150K-275K Annually
Senior level
In-Office
Austin, TX, USA
150K-275K Annually
Senior level
The Physical Design Engineer will focus on block-level implementation, timing closure, PPA optimization, and supervising outsourced design work while improving design flows.
The summary above was generated by AI

About Etched

Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Job Summary

Etched is looking for exceptional Physical Design engineers to join our team. In this role, you
will own block-level implementation and verification, drive timing closure and PPA optimization, supervise 3rd party design work, and help improve our design flows and iteration speed.


Key Responsibilities

  • Deeply understand what is involved in physical design

  • Running PD flows to close blocks, support ASIC infrastructure, automate PD flows,
    improve CAD infrastructure

  • Collaborate with RTL Designers and provide Physical Design feedback to improve PPA

  • Drive dashboards that show the convergence of projects related to PD

  • Optimize tool flows, working with EDA vendors to incorporate the latest features

  • Accountable for block level closure

  • Supervise the outsourcing of physical design to a 3rd party service

You may be a good fit if you have

  • 5-10+ years of previous experience with PD

  • Tools, flow, and design methodology from RTL synthesis to GDSII sign-off

  • Experience with back-end design and timing closure on advanced process nodes (5nm
    and below)

  • Experience with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler)
    automated RTL-to-GDSII flows

  • Experience with sign-off tools (PrimeTime, Tempus, Voltus, etc.)

  • Experience with UPF-based low power design methodology, power verification,synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS,
    routing, IR drop, and EM/antenna analysis

  • Deeply creative and able to think from first principles

Strong candidates may also have experience with

  • Familiarity with transformer models and machine learning

  • Ability to program with Python or another scripting language

  • Familiarity with AI tools for programming/coding

  • Startup experience or comfort working in fast-paced environments

Benefits

  • Medical, dental, and vision packages with generous premium coverage

    • $500 per month credit for waiving medical benefits

  • Housing subsidy of $2k per month for those living within walking distance of the office

  • Relocation support for those moving to San Jose (Santana Row)

  • Various wellness benefits covering fitness, mental health, and more

  • Daily lunch + dinner in our office

How we’re different:

Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.

We have a growing presence in Austin and a core team in San Jose (Santana Row), and we greatly value engineering skills. We do not have strict boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.


This role is based in our Austin office, with regular time spent working alongside the team in San Jose. During the first quarter, expect to spend approximately two weeks per month at our San Jose headquarters to ramp quickly. After that, this shifts to roughly one week per month for ongoing collaboration.

Top Skills

Cadence Genus
Cadence Innovus
Primetime
Python
Synopsys Fusion Compiler
Synopsys Icc2
Tempus
Voltus

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