Senior IP Logic and Validation Engineer

Job Details:

Job Description: 

Intel’s Central Engineering Group (CEG) seeks a highly skilled Senior IP Logic and Validation Engineer to join our dynamic engineering team and drive the development of cutting-edge semiconductor intellectual property. In this critical role, you will be responsible for designing, implementing, and validating complex digital logic circuits and IP blocks that form the foundation of next-generation electronic systems. You'll work collaboratively with cross-functional teams to ensure our IP solutions meet the highest standards of performance, reliability, and industry compliance while contributing to innovative products that shape the future of technology. This position offers an exceptional opportunity to leverage your expertise in logic design, verification methodologies, and validation frameworks while working with state-of-the-art tools and technologies in a fast-paced, innovation-driven environment.

Key Responsibilities

Advanced RTL Design & Development

• Develop sophisticated logic design, register transfer level (RTL) coding, and simulation for complex IP blocks required to generate cell libraries, functional units, and subsystems.
• Apply advanced strategies, tools, and methodologies to write optimized RTL that meets aggressive power, performance, area, and timing (PPAT) goals.
• Optimize logic design for design integrity and manufacturability in advanced process nodes.
• Create and maintain high-quality, synthesizable RTL code following industry best practices and Intel design standards.

Architecture & Microarchitecture Leadership

• Participate in the definition and refinement of architecture and microarchitecture features for assigned IP blocks.
• Collaborate with system architects to translate complex specifications into detailed design implementations.
• Lead design trade-off analysis and optimization decisions for performance, area, and power efficiency.
• Provide technical leadership in architectural reviews and design feasibility assessments.

Advanced Verification & Quality Assurance

• Review and enhance verification plans and implementation using UVM 2.0 methodologies to ensure comprehensive design feature verification.
• Resolve complex failing RTL tests and implement sophisticated corrective measures to ensure design correctness.
• Drive advanced verification techniques including formal verification, assertion-based verification, and coverage-driven verification.
• Establish quality assurance compliance processes for seamless IP-to-SoC handoff and integration.

Digital RF Design & Validation

• Design and validate digital RF IP blocks with focus on signal integrity, timing, and performance optimization.
• Apply specialized knowledge of RF design principles to digital implementation challenges.
• Collaborate with analog/RF teams to ensure proper digital-analog interface design and validation.
• Implement and validate digital control and calibration circuits for RF functionality.

SoC Integration & Customer Excellence

• Support SoC customers with high-quality integration and verification of complex IP blocks.
• Provide expert technical guidance and comprehensive documentation for seamless IP integration.
• Lead cross-functional collaboration with physical design, verification, and system integration teams.
• Drive resolution of complex integration challenges and system-level optimization.

Key Competencies

• Technical Leadership: Ability to drive complex technical decisions and mentor junior engineers.
• Innovation: Strong capability to develop novel solutions for challenging RF and digital design problems.
• Quality Excellence: Commitment to delivering world-class IP designs that exceed customer expectations.
• Cross-Functional Collaboration: Effective leadership across verification, architecture, and integration teams.
• Customer Focus: Strong customer engagement skills and ability to translate requirements into technical solutions.

Qualifications:

The Minimum qualifications are required to be initially considered for this position.  Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or in a STEM related field of study.
• 6+ years of Digital IP Design and Validation experience.
• 3+ years of Digital RF Design.
• 5+ Years of SOC Validation experience.
• Experience delivering complex IP blocks for advanced SoC integration
• Experience in Verilog/SystemVerilog RTL coding and advanced design methodologies.
• Experience with UVM 2.0 verification methodology and testbench development.
• Experience with EDA Verification Tools (i.e. Synopsys, Cadence, or Mentor Graphics).

Preferred Qualifications

• Post Graduate degree in Electrical Engineering, Computer Engineering, or in a STEM related field of study.
• Experience with advanced process technologies (7nm and below) and their RF design challenges.
• Familiarity with machine learning applications in design optimization and verification.

What We Offer

• Competitive salary and comprehensive benefits package.
• Opportunity to work on cutting-edge digital RF technologies and next-generation wireless products.
• Access to Intel's world-class design facilities and advanced EDA tool suites.
• Collaboration with leading RF engineers, system architects, and verification experts.
• Professional development opportunities including advanced training.
• Direct impact on Intel's leadership in wireless and RF semiconductor technologies.

          

Job Type:Experienced Hire

Shift:Shift 1 (United States of America)

Primary Location: US, Texas, Austin

Additional Locations:

Business group:As a member of the Chief Technology Office, Artificial Intelligence, and Network and Edge Group (CTO AI NEX), you will be committed to strategically penetrating the AI market by delivering disruptive and transformative solutions. Your focus will be on leveraging technology innovation and incubation to drive commercial success, ensuring that advancements create significant value. The team is dedicated to driving the software-defined transformation of the world's networks profitably, setting new standards for efficiency and connectivity. Through these priorities, you aim to lead the way in technological evolution and redefine the future of global networks.

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.  Find more information about all of our Amazing Benefits here:

https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003

Annual Salary Range for jobs which could be performed in the US: $161,230.00-262,680.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.