Nokia Logo

Nokia

Sr ASIC Physical Design Engineer

Posted Yesterday
Be an Early Applicant
In-Office or Remote
Hiring Remotely in United States
Senior level
In-Office or Remote
Hiring Remotely in United States
Senior level
Support digital hardware specification, design, and implementation, including ASIC physical design, build-controlled releases, hardware and software evolution, documentation, change control, quality standards, and troubleshooting. Improve processes and tools, provide technical guidance, manage project resources, and collaborate with customers on technical requirements. Required expertise includes CMOS technology, physical design flows, EDA tools, scripting, timing and power analysis, Verilog HDL, third-party IP integration, and advanced process nodes.
The summary above was generated by AI

Nokia of America CorporationSr ASIC Physical Design Engineer (Multiple Positions), Sunnyvale, CA. 

Responsibilities
  • Support specification, design, and implementation of digital hardware, applying design targets related to cost, yield, and reliability. 

  • Deliver hardware and software build-controlled productions releases, including EG main and update releases, service packages, maintenance updates, and customer design engineering. 

  • Manage product hardware and software evolutions through creation and release of documentation, change control management, and supplier and customer notifications. 

  • Participate in process and tool improvement initiatives. 

  • Maintain technical and design knowledge for assigned products and technologies. 

  • Ensure application and maintenance of quality engineering standards. 

  • Troubleshoot electronic engineering problems and apply the software care process when needed. 

  • Provide technical guidance and act as a subject matter expert to organization units and lower-level support teams. 

  • Determine project needs, including resource management and work allocation. 

  • Confer with customers to manage technical requirements. #LI-DNI 

Qualifications

Bachelor’s degree in Computer Science, Electrical Engineering, Electronic Engineering, or a related field, and 7 years of related work experience (5 years of which must be postbaccalaureate, progressive related work experience). 

Alternatively, will accept a Master’s degree in Computer Science, Electrical Engineering, Electronic Engineering or a related field, and 5 years of related work experience.

 

  • Must have 5 years of experience in physical design engineering;

  • Must have 5 years of experience utilizing digital design and CMOS technology;

  • Must have 5 years of experience in physical design flow, including: synthesis and floorplanning, placement, routing, clock tree synthesis, and physical verification;

  • Must have 5 years of experience using EDA tools, including Cadence Innovus, Synopsys IC Compiler, or Mentor Graphics Olympus;

  • Must have 5 years of experience using TCL, Perl, and Python in programming for scripting and automation;

  • Must have 5 years of experience using static timing analysis (STA) and power analysis tools and methodologies;

  • Must have 5 years of experience using Verilog HDL; and

  • Must have 5 years of experience integrating third-party IP and working with advanced process technologies, including TSMC 5nm and/or 3nm Technology nodes.

 

Telecommuting permitted from a location within commuting distance of Sunnyvale, CA up to 2 days per week. Employer will accept any suitable combination of education, training, or experience.

 

TO APPLY: Email CV to [email protected] with Job Code CA26-2508626 in subject line.

If offered employment, must have legal right to work in the U.S. EOE. Nokia of America Corporation offers a comprehensive compensation and benefits package: https://www.nokia.com/careers/our-locations/united-states/. 

 

About Us
Advancing connectivity to secure a brighter world.

Nokia is a global leader in connectivity for the AI era. With expertise across fixed, mobile and transport networks, powered by the innovation of Nokia Bell Labs, we’re advancing connectivity to secure a brighter world. 

Learn more about life at Nokia.


Our recruitment process

We act inclusively and respect the uniqueness of people. Our employment decisions are made regardless of race, color, national or ethnic origin, religion, gender, sexual orientation, gender identity or expression, age, marital status, disability, protected veteran status or other characteristics protected by law. We are committed to a culture of inclusion built upon our core value of respect.

If you’re interested in this role but don’t meet every listed requirement, we still encourage you to apply. Unique backgrounds, perspectives, and experiences enrich our teams, and you may be just the right candidate for this or another opportunity.

The length of the recruitment process may vary depending on the specific role's requirements. We strive to ensure a smooth and inclusive experience for all candidates. Discover more about the recruitment process at Nokia. 

About the Team
Some of our benefits in US:
  • Corporate Retirement Savings Plan
  • Health and dental benefits
  • Short-term disability, and long-term disability
  • Life insurance, and AD&D – Company paid 2x base pay
  • Optional or Supplemental life and AD&D insurance (Employee/Spouse/Child)
  • Paid time off for holidays and Vacation
  • Employee Stock Purchase Plan
  • Tuition Assistance Plan
  • Adoption assistance
  • Employee Assistance Program/Work Life Resource Program

The above benefits exclude students.


Disclaimer for US/Canada

Nokia Maintains broad annual base salary ranges for its roles in order to account for variations in knowledge, skills, experience and market conditions, and with consideration to internal peer equity. Check the salary ranges in the job info section for this role.

All North America job posts will post for a minimum of 7 calendar days and up to 180 days or until candidate/s identified.

Similar Jobs

2 Days Ago
In-Office or Remote
United States
Senior level
Senior level
Software
Supports ASIC digital hardware specification, physical design, implementation, verification, and release management. Performs synthesis, floorplanning, placement, routing, clock-tree synthesis, timing and power analysis, third-party IP integration, and troubleshooting. Improves processes and tools, maintains quality standards, manages hardware and software evolution documentation, allocates project resources, provides technical guidance, and coordinates technical requirements with customers and suppliers.
Top Skills: Cadence InnovusCmosMentor Graphics OlympusPerlPower AnalysisPythonStatic Timing Analysis (Sta)Synopsys Ic CompilerTclTsmc 3NmTsmc 5NmVerilog Hdl
6 Days Ago
Remote
United States
170K-250K Annually
Senior level
170K-250K Annually
Senior level
Defense • Manufacturing
Lead full physical design flow for complex SoC blocks and top-level integration from synthesis to GDSII. Drive timing closure, PPA optimization, physical sign-off (DRC/LVS, IR drop, EM), ECOs and tapeout. Collaborate with front-end, verification, DFT, packaging teams and external vendors, develop automation and methodology, and support products through production and spaceflight.
Top Skills: 2.5D Packaging3D PackagingCadence InnovusChip-Package Co-DesignCpfCtsDftDrcEco ImplementationEm AnalysisFinfetFloorplanningFusion CompilerGate-All-AroundGdsiiIr Drop AnalysisLvsPhysical VerificationPlace And RouteScripting/AutomationStaSynopsys Icc2SynthesisTsmc Sign-OffUpf
3 Minutes Ago
Remote or Hybrid
OH, USA
Senior level
Senior level
Financial Services
Lead software engineering for JPMorgan Chase’s Identity Governance team. Design, develop, test, troubleshoot, and maintain enterprise Java applications and IAM services supporting controls, compliance, legal, HR, and IT risk. Collaborate across distributed Agile teams, coach developers, monitor production processes, analyze data and system issues, and deliver secure, resilient, scalable solutions across global business lines.
Top Skills: AntCi/CdEclipseGitHibernateIntellij IdeaJ2EeJavaMavenMongoDBOpenid ConnectOraclePl/SqlSailpointScimService-Oriented ArchitectureSpring FrameworkSQLWeb Services

What you need to know about the Austin Tech Scene

Austin has a diverse and thriving tech ecosystem thanks to home-grown companies like Dell and major campuses for IBM, AMD and Apple. The state’s flagship university, the University of Texas at Austin, is known for its engineering school, and the city is known for its annual South by Southwest tech and media conference. Austin’s tech scene spans many verticals, but it’s particularly known for hardware, including semiconductors, as well as AI, biotechnology and cloud computing. And its food and music scene, low taxes and favorable climate has made the city a destination for tech workers from across the country.

Key Facts About Austin Tech

  • Number of Tech Workers: 180,500; 13.7% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Dell, IBM, AMD, Apple, Alphabet
  • Key Industries: Artificial intelligence, hardware, cloud computing, software, healthtech
  • Funding Landscape: $4.5 billion in VC funding in 2024 (Pitchbook)
  • Notable Investors: Live Oak Ventures, Austin Ventures, Hinge Capital, Gigafund, KdT Ventures, Next Coast Ventures, Silverton Partners
  • Research Centers and Universities: University of Texas, Southwestern University, Texas State University, Center for Complex Quantum Systems, Oden Institute for Computational Engineering and Sciences, Texas Advanced Computing Center

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account