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Senior AI Compiler Engineer

Posted 3 Days Ago
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In-Office
Austin, TX, USA
Senior level
In-Office
Austin, TX, USA
Senior level
As a Senior AI Compiler Engineer, you'll design and implement MLIR-based compilers for 5G/6G silicon, ensuring high precision in hardware-specific IR generation and memory management with a focus on advanced compiler techniques.
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Senior AI Compiler Engineer - Research Team
Austin, Texas
This is not a remote work opportunity.
MLIR Architecture | Compiler Infrastructure | 5G/6G Silicon | Bare-Metal AI
The Mission
Most AI compiler engineers optimize models for GPUs that already exist. You're going to optimize them for silicon that doesn't yet.
As our Senior AI Compiler Engineer, you're not porting a framework, tweaking a runtime, or wrapping CUDA libraries. You're doing something far rarer and far harder - building a complete MLIR-based compiler stack from the ground up, purpose-built to run massive AI models like Llama 3 on bare-metal 5G/6G telecommunications silicon, where there's no OS to bail you out and every byte of memory is accounted for.
The gap between a research model and hardware-optimized silicon execution is one of the most technically brutal problems in the industry right now. You'll be the engineer who closes it.
What You'll Actually Be Doing
MLIR Architecture - Own the Stack
You'll design and implement custom MLIR dialects from scratch - TableGen definitions, transformation passes, and the dialect conversion infrastructure that bridges the world of high-level AI graphs and the cold, hard reality of custom silicon. This is greenfield compiler work at its most consequential.
Lowering & Legalization - Zero Tolerance for Approximation
Take high-level computational graphs exported from JAX and StableHLO and lower them, step by step, into hardware-specific IR without losing a single bit of mathematical fidelity. Every op must legalize. Every semantic must survive the descent.
Concurrency & Memory Modeling - Orchestrate the Machine
There's no virtual memory here. No garbage collector. No safety net. You'll build static scheduling and tiling passes that choreograph data movement between HBM and on-chip local memory with surgical precision - because on this hardware, getting it wrong isn't a performance regression, it's a failure.
Production C++ - Code That Ships to Silicon
You'll maintain a high-performance, modular, LLVM-based compiler codebase where correctness and determinism aren't aspirational - they're required. This is production compiler engineering in the truest sense.
Join our Team
What You Bring
MLIR Mastery - You've built custom passes and dialect conversions, written TableGen definitions, and navigated the full complexity of the MLIR framework in a real production context
Compiler Fundamentals - Deep, hands-on C++ and LLVM expertise: IR structure, pass pipelines, and code generation pipelines that actually ship
Framework Integration - You've exported and lowered real models from JAX, PyTorch, or TensorFlow - you understand the gap between a research checkpoint and a deployable IR
Dialect Expertise - You know StableHLO or XLA at the op-semantics level, not just the API surface
What Makes You Exceptional:
Experience targeting Embedded DSP or VLIW architectures - instruction scheduling, register pressure, the works
Advanced optimization depth: loop tiling, vectorization, quantization lowering, fixed-point arithmetic
Hardware-level awareness of DMA engines, multi-level memory hierarchies, and complex number handling in MLIR - the stuff most compiler engineers never touch
Why This Role Is Different
This isn't a "make the existing thing faster" role. There is no existing thing. You'll be writing the compiler that a brand-new class of 5G/6G AI silicon runs on - and the decisions you make at the IR level will directly shape what that hardware can and can't do for the next generation of telecommunications infrastructure.
If you've ever wanted to work on a problem where the compiler, the hardware, and the research are all moving simultaneously - and where your code will eventually run at the edge of the global wireless network - this is that problem.
What happens once you apply?
Click Here to find all you need to know about what our typical hiring process looks like.
Ericsson uses a merit-based hiring approach that values people with different experiences, perspectives and skillsets. We truly believe this approach drives innovation, which is essential for our future growth. We encourage people from all backgrounds to apply and realize their full potential as part of our Ericsson team. Ericsson is proud to be an Equal Opportunity employer, learn more.
If you need assistance or to request an accommodation due to a disability, please contact Ericsson at [email protected].
DISCLAIMER: The above statements are intended to describe the general nature and level of work being performed by employees in this position. They are not an exhaustive list of all responsibilities, duties and skills required for this position, and you may be required to perform additional job tasks as assigned.
Primary country and city: USA || Austin, Texas
Job details: Developer
Primary Recruiter: Jim Everett
Compensation and Benefits at Ericsson
At Ericsson, we know that our people are the key to our success. We offer a competitive package to help with your individual needs and goals.
Your Pay
The salary range for this position is dependent on various factors including, but not limited to, location, and the candidate's combination of job-related knowledge, qualifications, skills, education, training, and experience
Your Health
Ericsson offers excellent health benefits including the choice of three medical plan options and a dental plan option that allow an employee to select the level of coverage that suits their needs. Employees will receive company credits in an amount equal to the cost that Ericsson pays toward the cost of their medical and dental premiums for themselves and eligible covered dependents.
Your Financial Security
We invest in both your short and long-term financial wellbeing. The Ericsson US 401(k) Plan offers an automatic 3% company contribution and Ericsson match $1 for every $1 you put into the 401(k) Plan on the first 3% of your eligible pay, plus 50 cents on every $1 on the next 2% of eligible pay. When you contribute at least 5% of eligible pay, you are receiving Ericsson's full matching contributions of 4%. Matching and company automatic contributions stop when your total eligible pay for the year reaches the IRS limits. Employees will also receive company credits in an amount equal to the cost of basic life insurance and basic accidental death and dismemberment coverage, as well as short-term and long-term disability coverage. Employees also have the option to participate in Ericsson's Stock Purchase Plan.
Your Time
Your work-life balance is important to us. New employees are provided a minimum of 15 days of accrued vacation, up to 3 personal days per year, 11 annual holidays, 8 hours of volunteer time, and 80 hours of sick time annually. Please note paid time off is pro-rated based on the employee's start date. Furthermore, Ericsson provides up to 16 weeks of paid maternity leave and 6 weeks of parental or adoption leave at 100% of pay.
Additional Benefits
Ericsson offers many other company-paid benefits such as financial wellness programs, educational assistance, matching gifts, and recognition programs.

Top Skills

Ai Models
C++
Jax
Llvm
Mlir
PyTorch
Stablehlo
TensorFlow

Ericsson Austin, Texas, USA Office

Ericsson Austin ASIC Design Center Office

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