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PsiQuantum

Senior Design Enablement Engineer

Posted 8 Hours Ago
Be an Early Applicant
In-Office or Remote
Hiring Remotely in Palo Alto, CA
130K-145K Annually
Senior level
In-Office or Remote
Hiring Remotely in Palo Alto, CA
130K-145K Annually
Senior level
Support development of silicon photonic products by creating design rules, evaluating layouts, and managing engineering samples in a foundry environment.
The summary above was generated by AI

Job Summary:


The PsiQuantum Foundry Engineering team is developing a silicon photonics (SiPh) technology platform in collaboration with our partners. Our efforts focus on integrating new materials and process modules that align with PsiQ’s plans for a commercially viable quantum computer. Key innovations include a superconducting single photon detector, ultra-low loss waveguides, light scattering mitigation structures ("dark box"), and a non-linear epitaxial metal oxide switch.


The team's primary responsibilities include enabling new technologies and modules while providing engineering support for the foundry. This involves establishing design rules, creating design manuals, developing reliability and qualification test vehicles, defining process assumptions, computational lithography, process tolerances, wafer acceptance criteria, patterning solutions, tool selection, and process development for new structures and materials. Additionally, the team analyzes inline data to generate effective engineering controls.


The Design Enablement Engineer will support the development of new silicon photonic products in a foundry environment, focusing on tape-out enablement, design rule creation, DRC checks, design for reliability, waiver review submissions, tape-outs, and Process Design Kit (PDK) revisions.


Responsibilities:

  • Execute new and updated design rules for photonics dies.
  • Act as a technical liaison between PsiQ's photonic design and reliability teams and the foundry.
  • Evaluate interactions among layout, design, technology, and fabrication.
  • Review DRC waiver requests, conduct technical risk assessments, and ensure proper documentation and approvals.
  • Plan and support the execution of engineering samples for system builds.
  • Contribute to product qualification activities, assisting in debugging and resolving technology/process issues.

Experience/Qualifications:

  • Advanced degree in Electrical Engineering, Electronic Engineering, or related field preferred.
  • Minimum 5 years of experience in semiconductor or EDA technologies.
  • Proven track record in executing complex cross-department projects and working with leading-edge semiconductor technologies.
  • Strong domain knowledge in process development, design manual creation, design rules, and DRC setup; expertise in new product technology development and reliability/qualification test site development.
  • Effective team player with the ability to collaborate across departments, sites, and time zones.
  • Excellent verbal and written communication skills, adaptable to diverse audiences.
  • Strong critical thinking, creativity, innovation, analytical, and detail-oriented problem-solving skills.
  • Highly focused, self-motivated, and capable of working independently with minimal guidance.
  • Demonstrated ability to manage multiple priorities and meet deadlines.
  • Genuine interest in quantum computing.
  • Able to thrive in a fast-paced start-up environment.

The ranges below reflect the target ranges for a new hire base salary. One is for the Bay Area (within 50 miles of HQ, Palo Alto), the second one (if applicable) is for elsewhere in the US (beyond 50 miles of HQ, Palo Alto). If there is only one range, it is for the specific location of where the position will be located. Actual compensation may vary outside of these ranges and is dependent on various factors including but not limited to a candidate's qualifications including relevant education and training, competencies, experience, geographic location, and business needs. Base pay is only one part of the total compensation package. Full time roles are eligible for equity and benefits. Base pay is subject to change and may be modified in the future.

U.S. Base Pay Range
$130,000$145,000 USD
Bay Area Pay Range
$160,000$175,000 USD

The ranges below reflect the target ranges for a new hire base salary. Actual compensation may vary outside of these ranges and is dependent on various factors including but not limited to a candidate's qualifications including relevant education and training, competencies, experience, geographic location, and business needs. Base pay is only one part of the total compensation package. Full time roles are eligible for equity and benefits. Base pay is subject to change and may be modified in the future.

Daresbury, United Kingdom
$160,000$175,000 USD
U.S. Pay Range
$130,000$145,000 USD

Top Skills

Eda Technologies
Semiconductor Technologies
Silicon Photonics

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