Senior Layout Engineer

About the Role
The Solutions Engineering Group is seeking a highly skilled Senior Layout Engineer to develop innovative custom standard cells targeting advanced semiconductor process technologies.
Do you thrive on solving complex physical design challenges?
Does delivering elegant, highly optimized layouts give you a sense of craftsmanship?
Are you motivated by the opportunity to influence methodologies and shape the quality of pioneering silicon?
If this sounds like you, we would like to get in touch about a role where you will collaborate closely with circuit designers and physical design teams to produce high-quality layouts that meet aggressive performance, power, and area targets! You will help define and refine layout methodologies, drive physical implementation excellence, and play a key role in enabling silicon on leading-edge process nodes.
This is a hands-on technical position for someone who is passionate about precision layout, has a deep understanding of design rules and physical constraints, and enjoys building optimized custom cells for advanced semiconductor technologies.
Responsibilities

• Create, optimize , and verify custom digital standard cell layouts, realizing advanced IP in the latest process technologies.

• Work within the Solutions Engineering Group on custom cell development, and customer-specific design solutions.

• Collaborate with circuit design and implementation teams to ensure performance, usability, reliability, and alignment with PDK constraints.

• Develop and/or aid in layout methodologies, automation scripts, and standard processes to improve productivity and consistency.

• Conduct full physical verification including DRC, LVS, ERC, and support resolution of verification issues.

• Drive continuous improvement in cell architecture, design rules understanding, and layout quality for next-generation processes.

Required Skills and Experience

• Associate's degree in Electrical Engineering , Microelectronics, related field or experience.

• 5+ years of hands-on mask/layout design experience in semiconductor or ASIC development.

• Expert proficiency with Cadence Virtuoso and deep experience with advanced layout techniques.

• Experience building or enhancing standard cell libraries or high-performance custom circuits.

• Familiarity with EM/IR, reliability constraints, and design-for-manufacturability (DFM) practices.

• Strong understanding of semiconductor device physics, PDK constraints, and layout-dependent effects (LDE).

• Proven experience performing DRC, LVS and handling signoff-quality verification flows. Interpretation of reports and debugging.

• Experience designing in advanced nodes (5nm and below).

• Ability to interpret schematics, floorplans , and design constraints and translate them into optimized layouts.

• Strategically plan and develop layouts with an eye towards maximum reuse across multiple architectures.

• Excellent communication and cross-team collaboration skills.

Nice to Have Skills and E xperience

• Familiarity with scripting for layout automation (e.g., SKILL, Tcl , Python) is highly desirable.

• Background working directly with process engineering teams or supporting early-node technology enablement.

• Beyond basic user knowledge of additional EDA tools such as Calibre , Assura, Pegasus, or similar.

In Return
We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding!

• Partner and customer focus

• Teamwork and communication

• Creativity and innovation

• Team and personal development

• Impact and influence

• Deliver on your promises

Our 10x mindset guides how we engineer, collaborate, and grow. Understand what it means and how to reflect 10x in your work: https://careers.arm.com/en/10x-mindset
Salary Range:
$136,400-$184,600 per year
We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process.
Accommodations at Arm
At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email [email protected] . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.
Hybrid Working at Arm
Arm's approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team's needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.
Equal Opportunities at Arm
Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don't discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.