Senior Middleware Development Engineer

Job Details:

Job Description: 

We are seeking a Senior Middleware Development Engineer to join our communication runtimes team to develop and contribute software features and optimizations to multiple communication libraries such as Intel SHMEM (Shared Memory Access), Intel MPI (Message Passing Interface), MPICH (Message Passing Interface Chameleon) and Intel oneCCL (Collective Communications Library).  

In this role, you will have an opportunity to build expertise with the latest Intel GPUs and CPUs used in the data center, work directly with scientists and engineers working on the Aurora supercomputer at the Argonne National Labs, and make meaningful contributions that improve scientific computing and machine learning. You will need to understand multiple levels of the communications stack, be self-driven, have high motivation to learn and want to use your outstanding analytical skills to make an impact and must have excellent communication skills.  

Your roles and responsibilities will include but not limited to:

• Design, develop, and maintain features and optimizations for Intel SHMEM, Intel MPI, MPICH, and oneCCL libraries
• Collaborate with cross-functional teams to define software requirements and specifications Optimize software to meet performance requirements, ensuring low latency, high bandwidth and high reliability

Qualifications:

Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Master’s degree in Computer Science or Computer Engineering.

• 5+ years in SW development
• 5+ years of Experience developing in Linux environment
• 5+ years of Experience in C and C++ programming
• Experience with multithreaded programming
• Experience with at least one of the following:
  • Distributed computing
  • HPC communications libraries
  • Collective communications libraries (i.e. MPI, oneCCL/NCCL, or SHMEM)
  • Developing software for GPUs
  • Developing software for one or more layers of the network communications stack

Preferred Qualifications:

• PhD. degree in Computer Science, Computer Engineering
• Experience developing performance optimizations that improve communications latency or throughput
• Experience debugging problems at different layers of the hardware and software stack

          

Job Type:Experienced Hire

Shift:Shift 1 (United States of America)

Primary Location: US, Oregon, Hillsboro

Additional Locations:US, Texas, Austin

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $149,600.00-284,580.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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