Senior Middleware Development Engineer

Job Details:

Job Description: 

Build the Future of High-Performance Computing

Join Intel's Communication Runtimes team and develop cutting-edge software that powers the world's most advanced supercomputers and AI systems. Work on communication libraries that enable breakthrough scientific discoveries and machine learning innovations at unprecedented scale.
What You'll Create - Next-Generation Communication Libraries

• Design, develop, and maintain features and optimizations primarily focused on Intel SHMEM (Shared Memory Access) with potential to contribute to Intel MPI (Message Passing Interface), MPICH, and Intel oneCCL (Collective Communications Library)
• Optimize software for exceptional performance: low latency, high bandwidth, and maximum reliability
• Build expertise with cutting-edge Intel GPUs and CPUs powering today's data centers

Revolutionary Impact

• Collaborate directly with scientists and engineers on the Aurora supercomputer at Argonne National Labs
• Make meaningful contributions that advance scientific computing and machine learning capabilities
• Work across multiple levels of the communications stack to solve complex distributed computing challenges

Cross-Functional Excellence

• Partner with cross-functional teams to define software requirements and technical specifications
• Drive performance optimizations that push the boundaries of what's possible in high-performance computing
• Contribute to software that enables breakthrough research in climate modeling, drug discovery, and AI

Essential Skills

• Self-driven with high motivation to learn emerging technologies
• Outstanding analytical and problem-solving abilities
• Excellent communication skills for technical collaboration
• Passion for making meaningful impact in scientific computing

Qualifications:

Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, Mathematics, or STEM-related field and 3+ years of relevant industry, internship, or research experience
• 3+ years of C and C++ programming experience
• 3+ years of Linux development experience
• Experience with multithreaded programming
• Experience in one or more of the following:
  • Distributed computing systems
  • HPC (High-Performance Computing) communications libraries
  • Collective communications libraries (i.e., MPI, oneCCL/NCCL, SHMEM)
  • GPU software development
  • Network communications stack development

Preferred Qualifications

• Post-graduate degree in Computer Science, Computer Engineering, Electrical Engineering, Mathematics, or STEM field
• Performance Optimization: Experience developing optimizations that improve communications latency or throughput
• Advanced Debugging: Experience troubleshooting complex issues across multiple hardware and software stack layers

Why This Role Matters

• Scientific Impact: Your code will enable groundbreaking research and discoveries
• AI Revolution: Power the next generation of machine learning and AI systems

          

Job Type:Experienced Hire

Shift:Shift 1 (United States of America)

Primary Location: US, Oregon, Hillsboro

Additional Locations:US, Texas, Austin

Business group:The Software Team drives customer value by enabling differentiated experiences through leadership AI technologies and foundational software stacks, products, and services. The group is responsible for developing the holistic strategy for client and data center software in collaboration with OSVs, ISVs, developers, partners and OEMs. The group delivers specialized NPU IP to enable the AI PC and GPU IP to support all of Intel's market segments. The group also has HW and SW engineering experts responsible for delivering IP, SOCs, runtimes, and platforms to support the CPU and GPU/accelerator roadmap, inclusive of integrated and discrete graphics.

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $128,880.00-245,160.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.