Jobs at Broadcom

Develops and deploys Calibre verification decks for advanced FINFET, GAA, and high-voltage technologies. Defines tool acceptance criteria, creates IP test cases and test structures, automates CAD workflows, supports extraction and simulation tools, resolves EDA and technology-file issues, documents processes, trains design engineers, and evaluates emerging EDA capabilities. The role collaborates with foundries, EDA vendors, and internal engineering teams to support physical verification and post-layout extraction.

Design, deploy, and optimize autonomous multi-agent AI architectures for semiconductor IP block development and support workflows. Integrate LLM orchestration and Model Context Protocol systems with enterprise verification frameworks to improve efficiency, quality, and automation across hardware engineering processes.

Provides senior-level technical consulting for mainframe infrastructure environments and Broadcom Software products. Responsibilities include solution architecture, product implementation and upgrades, integrations, demonstrations, proofs of concept, troubleshooting, technical documentation, customer presentations, and post-implementation support. The consultant advises clients and management on infrastructure strategies and works with account teams to design solutions. Requires expertise in z/OS, Broadcom mainframe tools, REXX or HLASM, and major mainframe subsystems and security managers. Client-site travel is required.

Designs complex flip-chip BGA packages for high-performance ASICs used in AI, networking, HPC, and 5G applications. Responsibilities include package layout, signal and power integrity, thermal and reliability considerations, manufacturability, and design of SerDes, ADC/DAC, DDR, and related structures. The engineer manages multiple projects, collaborates with global teams and vendors, interfaces with customers, and improves design processes through automation and documentation. This is a fully onsite role.

Develop competitive intelligence and product marketing programs for enterprise cybersecurity solutions. Create battlecards, compete kits, positioning guides, and market intelligence updates; train sales teams and partners on competitive positioning; and provide customized competitive guidance for strategic deals. Collaborate cross-functionally with product management, sales, engineering, and marketing teams while using AI productivity tools to streamline research and insight distribution.

Design and architect high-speed 100G+ SerDes signal-processing systems, including equalizers, FEC, filters, modulation, and analog compensation. Develop MATLAB and C/C++ models, simulations, requirements, verification plans, firmware, and lab tests. Collaborate with analog, digital, RTL, firmware, and validation teams to implement and debug ASIC designs. Support communications standards development, customer meetings, technical documentation, and marketing collateral.

Design and verify front-end RTL blocks for ASIC cores: define architecture, implement logic, perform synthesis, constraints, simulation and formal verification, analyze timing from physical implementation, debug Verilog designs, and collaborate across global teams within the full ASIC implementation flow.

Responsible for front end design and verification of ASIC design blocks, including architecture definition, logic design, synthesis, and verification through simulation and analysis of timing.

Perform DFT tasks including MBIST and scan insertion, ATPG and pattern simulation, ATE pattern development and silicon debugging, yield analysis, and cross-functional DFT collaboration during design and silicon bring-up.

The role involves designing flip-chip-BGA packages for ASICs, collaborating on designs, managing projects, and improving processes.

Design and verify high-speed SerDes physical-layer algorithms and architectures (100G+). Develop bit-exact MATLAB and C/C++ system models, run system-level simulations, collaborate with analog/digital teams, perform lab validation and firmware/debug, document requirements and test plans, support standards and customer interactions.

The Principal Kubernetes Software Engineer will design and develop features for Kubernetes, contribute to CNCF projects, lead teams, and mentor engineers while ensuring adherence to architecture, security, and compliance standards.

Lead design and implementation of an AI Virtualization Stack for ESXi, integrating PyTorch/JAX backends via OpenXLA. Optimize ML acceleration (LLM inference, KV-caching, FlashAttention), troubleshoot GPU/XPU runtime issues, collaborate with driver/device teams and vendors, and deliver production-quality code and documentation.

Senior mainframe infrastructure consultant providing architecture, implementation, upgrades, troubleshooting, demos/POCs, and technical leadership for Broadcom mainframe products. Requires coding/scripting (REXX/COBOL/HLASM), deep z/OS expertise, customer engagement, and travel to client sites.

Design and deliver high-performance flip-chip BGA ASIC packages addressing signal integrity, power integrity, thermal, reliability, and manufacturability. Perform physical layout, manage multiple projects, interface with customers and vendors, and improve design processes and automation.