Top Design Engineer Jobs in Austin, TX

Lead ASIC/SoC IP and subsystem development from microarchitecture through RTL signoff. Design parameterized SystemVerilog RTL, own PPA targets, and lead lint, CDC/RDC, DFT, synthesis, and timing activities. Architect interfaces, DMA, coherency, and HBM/DDR integration while collaborating with architecture, verification, and physical design teams. Improve design methodologies, mentor engineers, lead reviews, support post-silicon debug, and contribute automation flows.

Drives CPU performance verification methodology, circuit and timing quality signoff, process-node evaluation, frequency target recommendations, and performance, power, and area tradeoffs. Collaborates with RTL, circuit, and design teams to meet timing targets. Owns pre-to-post-silicon verification correlation and debugs circuit marginality. Requires advanced CPU circuit or backend design experience, circuit design and STA expertise, and strong execution and technical ownership.

The Senior/Staff Design Verification Engineer will be responsible for design verification in coherent interconnects. Specific responsibilities are not detailed, but expertise in this area is expected.

The RTL Design Engineer will design and analyze high-performance interconnects, ensuring they meet functional, performance, power, and area goals.

Leads complex mechanical and thermal product designs for liquid cooling, thermal management, and heat exchanger systems. Partners with architects, suppliers, customers, and global engineering teams; oversees prototypes, verification, design reviews, technical trade-offs, production release, and design innovation. Mentors engineers, manages distributed teams, resolves complex design issues, and leads projects from concept through production. The role may be remote in the United States or onsite in Austin, Texas, with up to 30% domestic or global travel.

Design and develop mechanical components and systems through the full product lifecycle. Responsibilities include CAD modeling, feasibility and risk analysis, prototyping, mechanical testing, FEA and CFD simulations, tolerance analysis, design for manufacture, supplier coordination, manufacturing support, engineering documentation, and compliance. The role also drives product validation, reliability improvements, cost reduction, and cross-functional innovation for aviation, robotics, and power-grid infrastructure products.

Design and implement CPU power management, reset, and clocking solutions. Collaborate with teams to verify and optimize designs based on RISC-V architecture.

Own block- and subsystem-level physical design from RTL synthesis through GDSII sign-off. Perform floorplanning, placement, CTS, routing, timing closure, sign-off (EM/IR/RC/DRC/LVS), generate abstracts for hierarchical integration, improve PPA with RTL collaboration, and supervise third-party delivery.

Designs and analyzes steel utility transmission and distribution structures using structural engineering software and finite element methods. Develops compliant, manufacturable, and cost-effective designs for quotes and orders; interprets customer specifications; supports drafting and sales; reviews drawings and as-built products; coordinates milestones; provides technical support; and ensures compliance with industry codes. The role may guide junior staff and requires up to 10% travel.

Design and verify digital integrated circuits, including processor architectures, memory-management units, multicore systems, and cache systems. Responsibilities include defining specifications, analyzing architecture trade-offs, participating in design reviews, supervising IC layouts, developing behavioral models, characterizing prototypes, and coordinating product testing and releases. The program also provides exposure to design verification and analog design through training and on-the-job projects.

Design and develop custom SRAMs and digital circuits for Intel CPUs. Optimize memory performance and work with domain experts on innovative technologies.

Design and implement highly-configurable TileLink interconnects, cache controllers, protocol bridges and other uncore RTL generators using Chisel/Scala. Drive performance and coherence improvements, integrate into Chisel/FIRRTL framework, collaborate on verification plans and documentation, and work with teams to deliver high-quality, configurable IP for SoCs.

The Physical Design Engineer will focus on block-level implementation, timing closure, PPA optimization, and supervising outsourced design work while improving design flows.

Lead SoC/ASIC DFT activities including scan insertion, compression scan, LBIST/MBIST, and ATPG pattern generation. Verify and debug ATPG testbenches and failures, work with synthesis/Verilog testbenches, apply JTAG/IEEE standards, and collaborate across architecture, design, and customers to independently deliver DFT solutions using Cadence flows.

Design machines using SolidWorks for a customer engagement. This fully remote contract is expected to last three months, with potential extension. Candidates should have at least two years of SolidWorks experience and be at an intermediate level or higher.

Design and validate high-speed SerDes and mixed-signal subsystems for next-gen SoCs, oversee full lifecycle from implementation to lab validation.

Seeking a Senior/Staff Digital Design Engineer for CMOS digital design, responsible for implementing high-speed data-processing circuits and prototyping in FPGA. Requires 7+ years of experience in high-performance ASICs and proficiency in algorithm modeling and hardware debugging.

The Senior Hardware Design Engineer will lead circuit card development, collaborate with teams on avionics platforms, and troubleshoot designs for space applications.

Own basepowercompany.com end-to-end: architecture, design, copy, and performance. Build and ship pages in Next.js/React/Tailwind, maintain brand consistency, run A/B and multivariate experiments with PostHog, optimize SEO and Core Web Vitals, build a component library, integrate AI-powered features, and collaborate with Growth, Design, Product, and Engineering to improve conversion and engagement.

The role involves designing and developing analog and mixed-signal IC blocks, supporting product validation, and collaborating with cross-functional teams.

The Staff Package Design Engineer will develop packaging solutions, collaborate with cross-functional teams, and ensure design rules are met while improving processes and efficiency in the design flow.

Develop and implement digital subsystems for mixed-signal ICs, supporting integration and verification while collaborating with cross-functional teams to ensure manufacturable designs.

As a Digital Design Engineer, you will design and implement digital subsystems for mixed-signal ICs, develop RTL designs, and perform verification and post-silicon validation.

Design and develop analog and mixed-signal ICs including data converters and amplifiers, manage full IC lifecycle, collaborate with teams, and conduct validation.

Design and develop analog and mixed-signal IC blocks while participating in the entire IC lifecycle, collaborating across teams, and ensuring manufacturability and performance optimization.