Top Design Engineer Jobs in Austin, TX

Design and build frontend experiences and components for the Cloudflare dashboard. Collaborate with design and systems engineers, own code from inception to release, and improve developer experience. Debug, optimize, and identify failure modes in large-scale frontend and distributed systems.

Design and develop reconfigurable Fuse and JTAG subsystems: write and debug RTL (SystemVerilog), perform static checks and implementation constraints, ensure quality and manufacturability across SoCs, collaborate with verification on test plans and debugging, and drive Arm-recommended solutions.

Design and integrate SoC subsystems (PCIe, DDR/LPDDR, HBM, UCIe, Ethernet); author micro-architecture specs; develop RTL in Verilog; perform static checks (CDC, RDC, X-Propagation, linting); collaborate with verification, performance analysis, and backend teams for floorplanning and timing closure; improve design methodologies and mentor team members while supporting project management.

The RTL Design Engineer will design and analyze high-performance interconnects, ensuring they meet functional, performance, power, and area goals.

Design and test power electronics for military and commercial aircraft, conducting research, troubleshooting, and ensuring compliance with specifications.

Design, develop, and maintain embedded firmware for AI computing platforms, focusing on Zephyr RTOS and low-level system integration in data centers.

The Senior Analog Circuit Design Engineer will design and verify analog circuitry for avionics, collaborate with engineering teams, and perform circuit analysis and troubleshooting.

Responsible for designing, testing, and verifying DC/DC and AC/DC power electronics for military and commercial applications, collaborating with multiple engineering disciplines.

The role involves leading the design and testing of complex digital circuit cards. Responsibilities include mentoring junior engineers, interfacing across departments, troubleshooting, and improving design methodologies.

Design, test, and verify DC/DC and AC/DC power electronics for military and commercial aircraft applications, collaborating across multiple disciplines.

As a Senior AI Compiler Engineer, you will design and build a custom MLIR-based compiler stack for next-gen silicon, optimizing AI models without an OS. Responsibilities include creating MLIR dialects, ensuring accuracy in lowering computational graphs, and maintaining a high-performance compiler codebase.

Lead end-to-end digital verification for complex SoCs, developing UVM/SystemVerilog testbenches, SoC-level C/C++ tests, automation, coverage goals, debugging, and collaborate with design teams to ensure production-ready silicon.

Design and develop primary and secondary structural components for a next-generation UAV. Execute full design lifecycle, perform hand calculations and limited FEA, support structural validation and testing, produce drawings and documentation, and collaborate with cross-functional teams to ensure manufacturability and system integration.

Lead design and development of primary and secondary structural components for next-generation UAVs, owning the full lifecycle from concept to production. Perform and guide linear/nonlinear FEA, stress and fatigue analysis, material selection (composites, aluminum), and structural validation testing. Collaborate with cross-functional teams for integration, manufacturability, and certification, mentor junior engineers, and improve design and configuration management processes.

Design and develop primary and secondary structural components for a next-generation UAV platform from concept through production. Create CAD models and drawings, perform hand calculations and basic FEA, collaborate with cross-functional teams for system integration, support structural testing and validation, resolve manufacturing and flight-test issues, and produce engineering documentation in compliance with aerospace standards.

Design and develop primary and secondary structural components for a next-generation UAV. Perform CAD modeling, hand calculations, limited FEA, generate drawings and documentation, support validation and testing, collaborate with cross-functional teams, and iterate hardware through manufacturing and flight tests.

The Senior Electrical Design Engineer will manage electrical design for BTM power solutions, ensuring compliance with standards, leading vendor coordination, and supporting commissioning activities for mission-critical deployments.

Lead RTL-to-GDSII physical implementation for advanced nodes (sub-16nm to 3nm). Define floorplanning, place-and-route, clock/power distribution, STA sign-offs, timing ECOs, and tool/flow improvements while collaborating with RTL, DFT, and EDA vendors.

Lead RTL-to-GDSII implementation for advanced nodes (sub-16nm to 3nm). Define floorplanning, place-and-route, clock and power distribution, and timing convergence. Perform STA, timing sign-offs, and timing ECOs; develop STA automation scripts. Collaborate with RTL/DFT teams and EDA vendors to improve flows, debug timing, and drive methodology alignment.

Lead end-to-end ASIC design for quantum computing systems: define requirements, architect RTL and verification, perform hands-on RTL/DSP implementation, manage tapeout and silicon bring-up, mentor engineers, coordinate vendors and cross-functional teams, and drive the silicon roadmap and FPGA-to-ASIC transitions.

Design and implement complex, accessible front-end components and a reusable design system. Architect UI solutions, prototype interactions, mentor engineers, improve design-to-development workflows, and build performant, responsive interfaces and marketing pages for a legal AI platform.

The ASIC RTL Design Engineer will design and verify RTL for complex ASICs, collaborating on cross-functional initiatives and optimizing circuits from specification to silicon.

Lead the design and implementation of debug, trace, and profiling hardware within SiFive's RISC-V ecosystem, focusing on quick market delivery and high performance.

The CPU Physical Design Engineer will implement custom CPU designs, conduct physical design flow, optimize designs, and collaborate on verification processes. They will work with EDA vendors and enhance methodologies for CPU design.

As a CPU Physical Design Engineer, you'll implement custom CPU designs from RTL to GDS and conduct all aspects of the physical design flow including synthesis, place, and route. You'll verify designs and collaborate with various teams to enhance microarchitectures.