Top Design Engineer Jobs in Austin, TX

Design and develop analog and mixed-signal ICs for consumer applications, involving full lifecycle from concept to production, using various design and simulation tools.

Design and implement digital subsystems for mixed-signal integrated circuits, collaborate with cross-functional teams, and lead verification processes.

Design and implement digital subsystems for mixed-signal ICs, developing RTL designs and ensuring proper integration with analog circuitry, while supporting verification and post-silicon validation.

Manage and grow the IP Integration Digital team; define strategy, requirements, and schedules. Oversee transistor-level design, characterization, Verilog modeling, and Cadence-based simulation/layout of custom and 3rd-party IP. Collaborate with product, foundry, layout, and quality teams to deliver qualified IP for mixed-signal chips.

The Analog Design Engineer will develop high-end ADC/DAC systems for optical communication, focusing on design and verification of complex analog circuits in advanced processes.

Design and implement VLSI communication systems, collaborating on micro-architecture, RTL coding, verification and debugging while optimizing performance and documenting designs.

Design and implement micro-architecture and RTL for low-power DSPs and hardware accelerators, optimize hardware/software interfaces, model and profile energy/performance trade-offs, collaborate on silicon bring-up and verification, and develop emulation models and test environments.

The Digital IC Design Engineer will develop micro-architecture and RTL for low-power processors and hardware accelerators in brain-computer interfaces, collaborating with teams on optimization and testing.

Design high-performance analog-to-digital and digital-to-analog converters, evaluate silicon, and oversee layout in advanced CMOS processes.

The role involves automating high-performance analog-to-digital and digital-to-analog converters while leading the Automation Compiler Team with innovation and design methodologies.

Design high-performance analog-to-digital and digital-to-analog converters, including circuits from specification to market introduction, while evaluating silicon and utilizing lab equipment.

Design and verify high-performance digital and mixed-signal ICs, focusing on RTL design, behavioral modeling, and digital control circuits.

The role involves high-performance analog and mixed-signal IC design, from specification to product introduction, requiring extensive experience in circuit design and lab evaluation.

Design and verify digital controllers for high-performance data converters, including coding in Verilog, behavioral modeling, and customer support.

Lead verification projects at subsystem/SOC level, develop testbenches, mentor engineers, and ensure metric-driven quality verification processes.

Physical Design Engineers at Tenstorrent are responsible for implementing high-performance AI SoC designs, overseeing the complete implementation flow from synthesis to tapeout and collaborating with cross-functional teams to ensure all design aspects are met.

Lead end-to-end physical implementation of large SoC blocks from RTL through GDS, including synthesis, floorplanning, place-and-route, timing signoff, physical verification, EMIR, formal equivalence, and low-power verification. Drive SOC clock construction and CTS, collaborate with CAD/RTL/DFT/architecture/power teams, influence PD tools and methodology, and communicate project status while owning technical delivery for medium-to-large designs.

Lead design verification for FPGA/ASIC systems using SystemVerilog/UVM and/or VHDL. Plan and implement constrained-random, metric-driven test plans, build self-checking testbenches and reusable VIP, collect/analyze coverage, mentor engineers, lead DV teams, and drive process improvements for Electronic Warfare systems.

Design and implement RTL components for AI accelerator ASICs from microarchitecture through tape-out and silicon bring-up. Responsibilities include writing and debugging SystemVerilog, optimizing power, performance, and area, supporting synthesis and timing closure, and applying lint, CDC, LEC, and assertion-based quality checks. The engineer collaborates with architecture, verification, and physical design teams while contributing to compute datapath, on-chip network, and memory subsystems.

Own microarchitecture and synthesizable SystemVerilog RTL for major AI accelerator blocks from specification through tape-out. Drive power, performance, and area optimization, timing closure, synthesis, STA, lint, CDC, LEC, assertions, and verification collaboration. Partner with architecture and software teams on performance improvements, advance EDA automation, lead design reviews, and mentor engineers.

Lead and deliver complex mechanical and thermal hardware designs for liquid-cooling and thermal-control products. Manage a small design team, coordinate with system architects and suppliers, drive prototype assembly and verification, lead technical reviews, resolve design trade-offs, ensure requirements traceability and manufacturing readiness, and mentor junior engineers through stage-gate development into production.

Design and develop mechanical components and assemblies for residential and commercial battery energy products from concept through production. Create CAD models and manufacturing drawings, perform thermal/stress/structural analysis, select materials, apply DFM, work with suppliers and manufacturing, integrate with electrical systems, and plan and run testing and validation.

Design and implement CPU microarchitecture features and ISA extensions using Chisel. Integrate designs into Chisel/FIRRTL framework, perform sandbox verification, collaborate on verification plans, optimize for physical implementation and performance, and document microarchitecture specifications.

Supports on-time delivery of parametric 3D CAD models and engineering drawings for virtual tire development, performance analysis, and mold tooling. Develops equation- and logic-driven PTC Creo models, collaborates with cross-functional teams to analyze and predict tire tread performance using in-house tools and FEA software, and helps improve modeling best practices. The role includes structured training, mentorship, and opportunities to develop advanced Creo expertise.

Lead advanced semiconductor package architecture, design, simulation, qualification, and production integration. Responsibilities include selecting packaging technologies and OSAT partners, defining layouts and materials, analyzing thermal, mechanical, electrical, and reliability performance, developing assembly processes, resolving yield and qualification issues, and supporting high-volume manufacturing. The role also requires cross-functional technical leadership, supplier collaboration, documentation, and mentoring of junior engineers.