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The Verification Architect at SiFive will ensure design fidelity for RISC-V based CPUs, develop verification strategies, and improve quality through collaboration with design teams.

The role involves analyzing and optimizing power consumption in SiFive IP, guiding architecture for power efficiency, and improving power analysis flows.

Develop and deploy methodologies for measuring and analyzing power consumption of SiFive IPs. Guide teams in designing energy-efficient IPs through power modeling and analysis.

Lead the design and implementation of debug, trace, and profiling hardware within SiFive's RISC-V ecosystem, focusing on quick market delivery and high performance.

The intern will join the Design Verification Infrastructure team to develop and maintain the Verification Platform, enhancing design verification technologies through collaboration and software development in Scala and Python.

The Staff Design Verification Engineer drives the verification of cache-coherent interconnect subsystems, focusing on CXL protocols and integration, defining verification plans, and improving overall verification quality through collaboration and mentorship.

As a Datacenter System Software Architect at SiFive, you'll design RISC-V Linux systems for datacenters, engage with customers, and optimize performance across software and hardware.