Lead and deliver BSP-level embedded software for communication, networking, and video applications. Develop device drivers, kernel configs, and Yocto/PetaLinux build flows; integrate and debug FPGA SoCs with hardware using schematics and lab instruments; set architecture and provide technical leadership, mentor teams, and work with customers. Remote with ~20% travel.

Owns block- and system-level verification for ASIC and FPGA designs, including test planning, UVM and formal environments, assertions, constrained-random testing, behavioral models, coverage closure, regression automation, and debugging. The role leads multiple verification projects, collaborates with designers and architects, reports progress, and advises external clients on verification strategy. Work is fully remote with possible domestic and international travel.

Design and deliver complex FPGA and CPLD systems using RTL, integrated IP, simulations, timing closure, and lab debugging. Collaborate with clients and cross-functional engineering teams on architectures spanning video, communications, storage, signal processing, and other advanced applications. Support design reviews, prototype demonstrations, documentation, technical estimates, proposals, and customer implementation. The role requires strong FPGA tool-flow expertise, communication skills, and customer presence.