Top Tech Jobs & Startup Jobs in Austin, TX

Lead the development of AI compiler tools, enhance performance analysis, collaborate with hardware teams, and mentor engineers to improve compiler tooling.

Develop and maintain infrastructure platforms for AI services, build APIs, manage Kubernetes clusters, and automate workflows using CI/CD practices.

Physical Design Engineers at Tenstorrent are responsible for implementing high-performance AI SoC designs, overseeing the complete implementation flow from synthesis to tapeout and collaborating with cross-functional teams to ensure all design aspects are met.

The engineer will join a CPU design team focusing on performance analysis, verification, and collaboration with architects to deliver efficient CPU designs using RISC-V ISA.

Partner with the C-suite to execute M&A, lead financial and business modeling for deals and fundraising, build/manage strategic partnerships across AI/semiconductor/data center ecosystems, prepare board-level strategy materials, and support government relations and stakeholder engagement.

Shape and evaluate next-generation high-performance RISC-V CPUs using performance modeling and simulation. Build and run architectural models (Gem5/SST/SimpleScalar), analyze pipelines, caches, branch prediction, and memory hierarchies, implement modeling and analysis tools in C++/Python, and collaborate with CPU architects to optimize AI/HPC workload performance. Hybrid role based in Santa Clara or Austin.

Responsible for physical design of high-performance CPUs and AI/ML architectures, including implementation from synthesis to tapeout, and collaborating with front-end teams.

The Project Manager will oversee People initiatives, ensuring smooth execution of promotions, performance, and surveys while coordinating cross-departmental communication and tracking progress.

As a Full-Chip Physical Design Verification Engineer, you will ensure manufacturable silicon by driving full-chip signoff, leading physical verification closure, and collaborating with various teams to achieve successful tapeouts.

The AI Subsystems Physical Design Lead is responsible for timing for subsystems in an AI chip, collaborating with RTL designers, and involved in synthesis, place and route, timing analysis, and power optimization.