Top Tech Jobs & Startup Jobs in Austin, TX

Lead development of low-level firmware for semiconductor products, coordinate HW/SW teams, design and validate firmware solutions, establish best practices, support IP usage and debugging, and ensure cross-version compatibility. Occasional international travel (~5%).

Develop and execute digital verification plans, UVM testbenches, test cases, and verification IP for IP/subsystem/SoC. Run simulations, coverage and regressions, debug silicon, automate reports, and collaborate across teams to meet product release requirements.

Perform digital/IP verification for semiconductor products: write verification plans, develop UVM SystemVerilog testbench components, SVA properties, run and debug RTL simulations, collect/analyze coverage, and perform assertion-based formal verification. Maintain verification environment scripts and makefiles.

Design, develop, and test semiconductor devices and chip layouts. Implement RTL-to-GDSII flows, perform static timing analysis, timing closure, PnR, CTS, and failure analysis. Use EDA tools to ensure designs meet specifications and collaborate with customers and teams on testing, production monitoring, and redesign for yield and compliance.

Design, develop, and test semiconductor IP: review microarchitecture, implement RTL, run LEC/Lint/CDC/STA/DFT checks, collaborate with verification to achieve full coverage, track metrics, and deliver RTL with quality signoff.

Perform RTL design, emulation delivery, and SoC verification for semiconductor products. Drive accelerated verification, debug complex SOC issues, improve emulation methodology, enable emulation models, and collaborate with R&D and EDA vendors to ensure high-quality, zero-defect chips.

Develop and execute RTL and IP verification strategies for memory controllers (including MRAM), build and maintain UVM testbenches, write assertions and coverage bins, debug waveforms, perform gate-level simulations, analyze coverage and add tests to close gaps, and support delivery of verified memory IP to SoC teams.

Develop and deploy machine learning and AI solutions for high-volume semiconductor wafer manufacturing. Integrate quality, engineering, production, and support teams to detect and prevent incidents, model large multi-source datasets, collaborate with SMEs, and contribute to global factory standardization and analytics improvements.

Design CMOS SRAM and ROM circuits and periphery to meet compiler performance, power, and area targets. Create and run simulation characterization and testbenches, work with layout and CAD teams, ensure frontend model alignment, and collaborate globally to share methodologies and implement GenAI/EDA efficiencies.

Characterize and model next-generation non-volatile memory (NVM) technologies, perform statistical reliability analysis, set qualification requirements, collaborate with foundries and product teams to ensure high-volume production reliability, and communicate results to internal and external stakeholders.