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Responsible for end-to-end verification of RTL designs, leading test bench architecture, mentoring engineers, and ensuring full functionality through detailed coverage analysis.

The DFT Engineer will define and implement DFT methodologies for complex digital chips, debug DFT features, and validate silicon tests.

Develop, maintain, and optimize high-performance SystemC/TLM models for ASIC and optical systems. Translate DSP algorithms from MATLAB to SystemC, create executable reference models, integrate models into mixed-language verification flows, collaborate with architecture/RTL/verification teams, and support system-level debugging and performance analysis.

The Senior Embedded SW Engineer will lead DSP firmware development, provide technical guidance, and collaborate with cross-functional teams to drive project success.