Top Tech Jobs & Startup Jobs in Austin, TX

Create technical content explaining Efficient Computer’s processor architecture, compiler, benchmarks, applications, and energy-efficiency results. Responsibilities include writing blogs, application notes, white papers, newsletters, web pages, scripts, presentations, and sales materials; hands-on evaluation hardware bring-up, software compilation, measurement, data analysis, demos, and technical reviews; and supporting webinars, conferences, and content optimization. The role requires an engineering background, strong technical writing, C or C++, development hardware experience, and Python or similar data-analysis skills.

Lead end-to-end functional verification for complex ASIC and SoC designs from specification through tapeout. Define verification strategy, architect UVM testbenches, drive constrained-random testing and coverage closure, manage regressions and bug lifecycles, debug complex failures, support CDC/RDC and gate-level simulation, coordinate emulation handoff, and lead verification sign-off. Mentor and grow the verification team while collaborating with compiler, RTL, DFT, physical design, and post-silicon teams.

Manage semiconductor supply chain and operations during the transition from prototype to production. Responsibilities include sourcing and procuring third-party semiconductor IP, negotiating commercial terms, evaluating vendors with engineering teams, managing logistics and international trade operations, supporting foundry and OSAT activities, analyzing costs, maintaining supply chain procedures and trackers, and escalating risks. The role also supports planning, inventory, supplier relationships, and process development in a fast-moving startup environment.

Design, integrate, and sign off synthesizable RTL for ultra-low-power SoC blocks, including compute fabric interconnects, memory interfaces, peripherals, low-power logic, and power-management systems. Own front-end quality through lint, CDC/RDC, LEC, synthesis, timing, and power analysis. Support verification, gate-level debugging, physical-design closure, tapeout, and silicon bring-up while collaborating with architecture, DV, physical design, and firmware teams.

Own verification for complex SoC blocks and subsystems from specification review through coverage sign-off. Build and extend UVM/SystemVerilog environments, develop assertions and coverage models, debug simulations, drive coverage closure, report verification risks, and document environments. The role requires extensive ASIC/SoC verification experience, strong scripting skills, independent execution, and collaboration with RTL designers and architects. Preferred experience includes C/C++, formal verification, AI-assisted verification, computer architecture, ML accelerators, and power-aware verification.

Lead microarchitecture definition and synthesis-ready RTL implementation for processor and accelerator SoCs. Own dataflow execution fabrics, memory subsystems, on-chip networks, low-power logic, peripheral integration, and hardware/software execution models. Drive PPA optimization, verification collaboration, design documentation, mentoring, synthesis and timing closure, DFT support, tape-out, and silicon bring-up for highly energy-efficient edge-computing hardware.

Drive functional verification of complex ASIC, SoC, and IP designs from specification through tapeout. Build UVM and constrained-random testbenches, achieve functional and code coverage closure, debug simulation failures, and develop Python-based automation and regression flows. Collaborate with software and technical leadership to communicate verification risks and status. Preferred experience includes formal verification, AI-assisted verification, pre-silicon software testing, post-silicon validation, SoC architecture, and power-aware verification.

The Senior Product Manager - Software defines the roadmap for Efficient Computer's developer platform, focusing on SDKs, compilers, and ensuring robust developer experiences while driving strategy and metrics for product success.

Serve as the technical bridge between customers and engineering teams during silicon IP evaluation and SoC integration. Responsibilities include verification environment setup, RTL and integration debugging, synthesis, physical implementation, timing closure, signoff, training, pre-sales evaluations, customer reviews, release validation, and creating reusable enablement resources. The role requires broad ASIC/SoC expertise, scripting, IP integration experience, and customer-facing communication, with approximately 20–30% travel.