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The RTL Design Engineer will design and implement components for next-gen AI processors, collaborate on microarchitecture, and drive timing closure, optimizing for performance and power efficiency.

The role involves verifying mixed-signal and digital systems, creating RNMs, ensuring interface clarity, and contributing to methodologies across teams.

Develop and maintain emulation platforms for AI-centric SoCs, integrate RTL, support firmware bring-up, debug co-design issues, and analyze AI workload performance.

Develop and verify designs for AI processors, focusing on system-level verification, testbench development, and collaboration with RTL designers.