Top Tech Jobs & Startup Jobs in Austin, TX

Lead supply chain planning transformation for Microsoft Cloud: define strategy, align stakeholders, manage portfolio delivery, coach teams, set KPIs/OKRs, partner with engineering for solutions, oversee change adoption, and ensure solution quality, compliance, and measurable business value across large-scale planning initiatives.

Lead functional verification and validation of complex DPU/SoC designs across pre-silicon and post-silicon stages. Develop UVM/C testbenches, C tests and firmware, define test plans, run regressions, debug failures, create stress/performance scenarios, participate in chip bring-up, and mentor engineers while collaborating with architecture, design, and partner teams.

Lead and execute block- and sub-chip physical design including floorplanning, synthesis, placement, CTS, routing, STA, physical verification, formal equivalency, power/IR-drop/EM analysis. Improve flows, automate methodologies, evaluate technology nodes/IP/EDA tools, report status and risks, and support program needs with occasional travel.

Lead BIOS/UEFI firmware strategy and delivery for Microsoft Azure fleet. Define vendor-agnostic requirements, drive security/validation, oversee NPI for new hardware SKUs, manage agile delivery, and collaborate with partners and silicon vendors to optimize performance, telemetry, and diagnostics.

Lead static timing and physical design validation for digital and mixed-signal blocks, collaborate with RTL/PD/mixed-signal/DFT/CAD teams, run and debug PD flows and timing reports, drive timing closure and PPA trade-offs, and contribute to automation and flow improvements using data-driven mitigations.

Design, verify, and validate analog circuit components for SerDes interface IP (PLL, clock distribution, transmit/receive macros). Perform mixed-signal and post-layout verification, generate timing models, coordinate with layout designers, ensure behavioral model accuracy, and support calibration and post-silicon validation.

Lead functional validation of PCIe IP at block, cluster, or full-chip levels using UVM/C testbenches and VIP. Develop test plans and unit tests, create and manage regression suites, debug failures, and drive fixes. Improve validation efficiency via methodologies and tools and meet coverage goals toward successful tapeout.

Manage global supply planning for Microsoft custom silicon and data center infrastructure. Responsibilities include creating supply plans, coordinating suppliers, 3PLs, and system integrators, reviewing purchase orders, monitoring inventory and shortages, planning product transitions, defining inventory buffers, assessing financial exposure, and performing scenario analysis to mitigate supply risks.

Perform system modeling of analog circuits and SerDes interface IP; coordinate post-silicon interfaces between ATE/validation and design teams; lead debug activities; contribute to analog circuit-level architecture and overall architectural direction; support post-silicon validation, waveform review, and calibration debugging.

Develop and operate large-scale, low-latency Azure cloud services for hardware health monitoring, anomaly prediction, telemetry, reliability, and performance. Evaluate and implement AI technologies, including LLMs, embeddings, RAG, and custom machine learning models, to improve firmware and hardware. Lead root-cause analysis, service restoration, testing automation, security and compliance, production deployment, and analytics reporting.