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The role involves developing layout design methodologies, integrating full-chip SoC designs, collaborating with various teams, and ensuring scalable solutions for testchip platforms.

Lead and execute ASIC/SoC verification: define verification strategies, develop SystemVerilog/UVM environments, run simulations and formal checks, debug pre-silicon issues, analyze power/performance, collaborate with architects and RTL teams, improve verification methodologies, and mentor junior engineers.

Lead emulation and FPGA modeling from RTL through synthesis and partitioning to enable presilicon verification and software development. Develop, integrate, test, and debug hardware/software in simulation, emulation, and FPGA models; create tools and automation to improve emulation efficiency; optimize performance and debug failing RTL tests; collaborate with cross-functional teams and mentor engineering leaders.

The CPU Physical Design Engineer will implement custom CPU designs, conduct physical design flow, optimize designs, and collaborate on verification processes. They will work with EDA vendors and enhance methodologies for CPU design.

Develop communication libraries for high-performance computing, optimizing software, collaborating with scientists, and resolving distributed computing challenges.

As a CPU Physical Design Engineer, you'll implement custom CPU designs from RTL to GDS and conduct all aspects of the physical design flow including synthesis, place, and route. You'll verify designs and collaborate with various teams to enhance microarchitectures.

The role involves performing physical design implementation, conducting verification and signoff, optimizing CPU design, and collaborating with various teams. Key responsibilities include synthesis, place and route, and static timing analysis.

Design and optimize advanced embedded memory IP (SRAM, register files, ROM) for Intel CMOS processes. Perform memory pathfinding, PPA optimization, custom circuit design, layout and automation, pre-silicon verification and post-silicon validation/debug to enable yield and product ramp. Collaborate with domain experts, EDA vendors, and product teams to deliver memory collaterals and test chips.

The CPU Memory Design Engineer will design and develop custom memories and digital circuits for Intel CPUs, focusing on low-power and high-performance memory designs.

Design and develop custom and compiler-based memory circuits including SRAMs and caches, focusing on high-performance and low-power implementations.