Top Tech Jobs & Startup Jobs in Austin, TX

The role involves analyzing user information, documenting business processes, training users, supporting testing, and managing data configurations with Windchill PLM.

Perform functional verification of mixed-signal logic components by developing verification plans, testbenches, and environments; run system simulations; debug presilicon issues; collaborate with architects, RTL and physical design teams; document and improve verification infrastructure and methodology.

Leads demand planning, Sales and Operations Planning, and long-range planning for semiconductor foundry operations. Manages production and engineering demand, product roadmaps, forecasts, capacity allocation, inventory, and supply readiness. Collaborates with business development, engineering, operations, and supply chain teams to identify risks, improve forecast accuracy, and align material, vendor, customer, and manufacturing capacity with projected demand.

Leads sales operations and revenue programs for Intel Foundry, coordinating cross-functional stakeholders, supply chain activities, customer engagement, and business readiness. Owns program lifecycle management, reporting, risk resolution, process improvements, and revenue optimization activities. Requires semiconductor or manufacturing experience, sales or finance analytics expertise, supply chain planning systems knowledge, and advanced Excel skills.

Designs and develops advanced full-custom and compiler-based memory circuits, including SRAMs, caches, register files, ROMs, and custom memories. Responsibilities include circuit simulation, characterization, cache and critical-path analysis, memory architecture, bit-cell and peripheral design, automation, PPA optimization, methodology development, and cross-functional execution for advanced CMOS CPU and SoC products.

Leads large-scale technical programs spanning design-technology co-optimization, circuit design, foundational IP, and design enablement. Partners with engineering teams, customers, EDA vendors, and ecosystem stakeholders to align technical strategy, drive execution, improve organizational processes, and represent program roadmaps to senior leadership. Responsibilities also include mentoring engineers, workforce development, hiring, training, budget planning, and organizational transformation.

Leads business development for Intel’s neuromorphic computing portfolio, identifying strategic opportunities across robotics, edge AI, autonomous systems, sensing, communications, and aerospace. Builds customer and partner relationships, drives evaluations and proof-of-concepts toward commercial deployment, develops ecosystem partnerships, translates market needs into product priorities, assesses competitors and trends, shapes go-to-market strategies, represents the lab externally, and manages the opportunity pipeline.

Develops and maintains SystemVerilog and UVM verification environments for PLL and FLL clock-generator IPs. Performs functional and mixed-signal validation, creates test plans, debugs pre-silicon issues, and root-causes failures. Collaborates with architects, RTL developers, and analog design teams to verify microarchitectural requirements, refine methodologies, and support multiple IP generations.

Develop and maintain transistor-level timing characterization flows for custom IP, memories, SRAMs, register files, and compiler-generated macros. Build CAD infrastructure, automation, and validation methodologies for timing, power, and noise models. Collaborate with circuit design, memory, STA, methodology, and EDA vendor teams. Support hardware design, verification, integration, layout, and timing development for advanced semiconductor technology nodes.

Performs CPU physical design from RTL through GDS, including synthesis, floor planning, placement and routing, clock tree synthesis, timing closure, power and reliability analysis, and signoff verification. The role optimizes CPU designs for power, frequency, and area; collaborates with architecture, logic, circuit, automation, and EDA vendor teams; develops physical design methodologies; and supports tapeout on advanced process technologies.