Top Tech Jobs & Startup Jobs in Austin, TX

Develop next-gen ASICs for space deployment, perform design implementation, collaborate with teams, and resolve timing/congestion issues in chip development.

Develop next-generation silicon for SpaceX's Starlink initiative, performing physical implementation steps, improving methodologies, and collaborating with design teams.

The engineer will handle full-chip physical verification, including DRC, LVS, and ESD signoff, while optimizing design flows for advanced SoCs and engaging with foundry teams.

Lead global sourcing and supplier management for datacenter memory and storage (HBM, DDR5, SSDs). Define commodity strategy and roadmaps, secure large-scale supply, negotiate high-value agreements, manage inventory and risk, drive cost reductions, and track KPIs while partnering with engineering and platform teams.

Lead digital ASIC verification at block and system level: write and execute test plans, develop test harnesses and regressions, close coverage, support pre-silicon verification, chip bring-up and post-silicon validation, and collaborate with cross-disciplinary teams to verify complex digital designs.

Develop and execute digital ASIC verification at block and system level. Build SystemVerilog (UVM and non-UVM) testbenches, write test plans, run regressions, close coverage, automate test generation with Python and MATLAB, and support pre-silicon verification through post-silicon validation and chip bring-up.

Develop and verify Design for Test (DFT) infrastructure for ASIC/SoC designs: evaluate scan insertion readiness, integrate and verify DFT IP, run ATPG and gate-level simulations, create post-silicon ATPG content, and collaborate with physical design and manufacturing teams to ensure high scan coverage and testability in silicon.

The Principal Design Verification Engineer will verify ASICs/FPGA designs, lead test plans, and ensure designs meet specifications. Collaborating with cross-disciplinary teams, the role involves pre-silicon verification and post-silicon validation.

The Sr. IC Package Design Engineer will lead advanced package selection for ASICs, manage design verification, and collaborate with cross-functional teams for optimal silicon integration.

Manage end-to-end strategic relationships with ODMs and CMs for hardware builds, optimize processes, negotiate agreements, and drive quality and cost efficiencies.