Top Tech Jobs & Startup Jobs in Austin, TX

Leads FP&A for SpaceX’s AI segment with executive visibility into spending, resource planning, contract profitability, capital expenditures, cash forecasts, and operational performance. Partners with production, engineering, supply chain, accounting, sales, and business leaders to analyze KPIs, variances, commitments, and financial results. Supports business initiatives, reporting, and financial close activities while managing and developing a team of financial analysts.

Lead and grow a sourcing team responsible for GPU/CPU/storage/server/rack procurement and ODM/CM relationships. Define commodity strategies and roadmaps, secure supplier capacity, negotiate agreements, manage supply risk and cost through should-cost/value engineering, track KPIs, and align cross-functionally to support large-scale AI training infrastructure.

Lead and grow a sourcing team for datacenter compute infrastructure supporting SpaceXAI. Define commodity strategies and roadmaps, secure GPU/CPU/storage supply, manage ODM/CM relationships, negotiate major agreements, mitigate supply chain risks, drive cost reduction, align with engineering, and report KPIs to senior leadership.

Lead cross-disciplinary teams to drive complex ASIC projects from kickoff through production. Manage schedules, suppliers, bring-up, qualification, and ramp-to-production while coordinating with internal and external partners to resolve issues and accelerate silicon deployment.

Develop and optimize DFT architectures for ASICs, performing validation, integration, and test pattern generation, while collaborating with cross-functional teams.

Design, implement, and maintain AV systems for collaboration and event spaces. Collaborate with construction and design teams, support high-profile events (launches, concerts), and provide technical AV, lighting, and automation support and troubleshooting.

Develop next-generation silicon for SpaceX's Starlink initiative, performing physical implementation steps, improving methodologies, and collaborating with design teams.

The engineer will handle full-chip physical verification, including DRC, LVS, and ESD signoff, while optimizing design flows for advanced SoCs and engaging with foundry teams.

Lead digital ASIC verification at block and system level: write and execute test plans, develop test harnesses and regressions, close coverage, support pre-silicon verification, chip bring-up and post-silicon validation, and collaborate with cross-disciplinary teams to verify complex digital designs.

Develop and execute digital ASIC verification at block and system level. Build SystemVerilog (UVM and non-UVM) testbenches, write test plans, run regressions, close coverage, automate test generation with Python and MATLAB, and support pre-silicon verification through post-silicon validation and chip bring-up.