Top Tech Jobs & Startup Jobs in Austin, TX

Develop and deploy CAD and EDA tooling for CPU/SoC/NoC teams, create automation using graph algorithms, support chip design flows, collaborate across architects, RTL and physical design teams, and drive cross-team tool deployment and productivity improvements.

Serve as NVIDIA's primary liaison to Dell Services worldwide to drive joint enterprise AI adoption. Lead partner enablement, joint offer development, pipeline and account planning, deal support, delivery coordination, and field readiness. Collect field feedback to influence product and services strategy and track engagement and revenue impact.

Develop and optimize high-performance CUDA kernels and distributed AI systems for deep learning applications, collaborating with researchers to enhance model performance and efficiency.

The role involves integrating CUDA features into AI frameworks, optimizing performance, and collaborating with teams on AI model development. Responsibilities include design, analysis, and enhancement of AI tools and frameworks.

Lead development of memory system architecture and micro-architecture for SoCs. Build and maintain performance models and simulations, analyze benchmarks and workloads, identify micro-architectural tradeoffs, and debug performance and functional issues across high-level models, RTL simulation, and silicon.

Design and architect on-chip GPU/CPU clock domains, collaborate with front-end, physical design, timing, verification and SW teams to implement clock RTL, optimize PPA, support ASIC implementation through sign-off and silicon bring-up.

The Senior System Software Architect will design, validate, and create enterprise AI factory architectures, collaborating with various teams to optimize deployment strategies and systems performance across compute, storage, and networking infrastructures.

The Senior Product Manager is responsible for driving the roadmap and delivery of NVIDIA Cloud Functions, engaging with design partners, and collaborating with the open-source community.

The role involves developing an inference framework for large language models and optimizing performance on embedded platforms, collaborating across teams and contributing to CUDA kernel development.

Develop and invent parallel, graph-based RTL analysis and optimization methods. Analyze RTL impacts on latency, power, DFT, clocking, and power delivery. Explore ML (LLMs, GNNs, GANs, RL) and high-performance algorithms for logic synthesis, clustering, and implementation. Drive end-to-end tool development and collaborate with design teams to deploy optimizations.