Top Tech Jobs & Startup Jobs in Austin, TX

Serve as technical lead between NVIDIA and hyperscale CSPs on GPU firmware and system software. Drive firmware update orchestration, recovery procedures, multi-GPU coordination, telemetry/health monitoring, and incorporate CSP feedback into NVIDIAs roadmap to improve fleet-scale manageability and reliability.

Design and implement CUDA Tile compiler transformations, MLIR dialects, lowering passes, and optimization techniques for NVIDIA GPUs. Optimize tile-based kernel performance across GPU generations, define public APIs, conduct performance analysis, and develop robust software, tests, and debugging workflows. The role requires independent project ownership and collaboration within a product-focused engineering team.

Lead technical engagements with cloud service providers on rack-scale system software and firmware. Drive architecture alignment, integration readiness, error handling and recovery, health telemetry, firmware orchestration, and serviceability. Capture CSP feedback, influence NVIDIA system software design, improve tooling and tests, and mitigate execution risks through early collaboration.

Lead the architecture and implementation of hardware Root of Trust solutions for NVIDIA SoCs and GPUs. Collaborate across hardware, software, research, marketing, customers, and partners to define security roadmaps, review architecture and verification specifications, address threats, and ensure platform security requirements. Responsibilities include secure boot, cryptography, CPU security, physical attack mitigations, remote attestation, DRM, threat modeling, penetration testing, and certification compliance.

Partner with architecture and design teams to plan and execute functional and performance verification for GPU memory subsystem IP. Develop testbenches, BFMs, monitors and regressions, close coverage, enable FPGA/software testing, and support post-silicon verification and debug to sign off RTL.

Drive physical design of high-frequency, low-power CPUs/GPUs/SoCs at block, cluster, or full-chip level with emphasis on netlist quality: equivalence checking/formal verification, CDC and MTBF analysis, logic synthesis, timing convergence, STA, constraint generation/management, and ECO implementation. Use industry-standard EDA tools and scripting to debug and improve flows.

Develop and implement compiler optimization algorithms for deep learning workloads, analyze networks, debug and profile GPU performance (CUDA), define public APIs, and deliver ahead-of-time and just-in-time compilation techniques for NVIDIA GPUs to improve inference performance, build times, and memory efficiency.

Lead and grow the Isaac Manipulation engineering team to deliver production-grade robotic manipulation capabilities. Define roadmap, bridge research and product, partner with OEMs and developers, leverage NVIDIA GPUs/CUDA/PyTorch and simulation for sim-to-real learned policies, and drive delivery of manipulation stacks onto physical robots.

Lead alignment of NVIDIAcompiler codebases with open-source projects, build tooling and workflows to improve developer productivity, automate rebasing/patch management and apply AI-assisted workflows, while partnering with architecture and CI teams to scale changes across NVIDIA.

Design and implement Rust-to-GPU compiler backends, IR frameworks, and JIT/AOT toolchains. Lower Rust AST/MIR to MLIR/LLVM/PTX, build GPU-specific optimizers, enforce safe parallel abstractions across host/device boundaries, and expose ergonomic device-side primitives. Drive projects from research to production and support profiling, debugging, and benchmarking workflows.