Top Tech Jobs & Startup Jobs in Austin, TX

Verify fabric and interconnect IP and full-chip SoC integrations using SystemVerilog/UVM testbenches. Develop constrained-random and directed tests, protocol compliance checks, performance analysis, and collaborate with architecture, design, emulation, and post-silicon teams to ensure correct, high-performance interconnects.

Own production Slurm support cases for AI and HPC customers, diagnosing scheduling, resource allocation, accounting, authentication, networking, storage, database, GPU, and high-availability issues. Advise on configuration, upgrades, operations, and incident recovery; investigate performance and scalability problems; collaborate with engineering on defect reports and reproductions; and develop technical guides, diagnostic tools, and training. The role requires extensive production Slurm administration experience and expert Linux systems knowledge.

Develop and maintain scalable build, regression, and release infrastructure for chip designers. Build user-facing services for scheduling, tracking, and triaging workflows, plus tools for collecting, analyzing, monitoring, and visualizing system metrics. Apply modern CI/CD practices, maintain reliable production-quality code, and support distributed computing, build systems, and software performance analysis.

Design and optimize agentic AI systems for NVIDIA’s CUDA ecosystem, including agent architectures, multi-agent workflows, tool use, memory, orchestration, training, verification, reward, and evaluation systems. Co-design AI systems across models, inference, compilers, runtimes, libraries, kernels, and GPUs. The role requires strong C/C++, Rust, and Python skills, GPU programming expertise, and experience with agent systems, reinforcement learning, or modern AI inference.

Design and deploy test methodologies for advanced NVIDIA silicon, including DFT architectures, ATPG verification, coverage analysis, pattern generation, and ATE bring-up. Partner with EDA vendors, CAD, VLSI, and product engineering teams to develop scalable test solutions. Lead complex scan-test lifecycles, support advanced chiplet and 3D designs, and mentor junior engineers.

Supports and root-causes complex customer issues involving NVIDIA networking and AI cluster technologies. Develops bug fixes, workarounds, diagnostic tools, and performance-tuning recommendations in collaboration with R&D and support teams. Works with InfiniBand, NVLink, Spectrum-X, and high-performance lossless networks, analyzing logs, traces, metrics, and source code. Provides customer support and may work occasional weekends or holidays.

Design and architect GPU and CPU clock domains for ASICs, balancing functional, physical, testing, power, performance, and area requirements. Develop clocking RTL, collaborate with front-end, physical design, timing, verification, DFT, and software teams, and support synthesis, signoff, silicon debugging, and bring-up. The role also involves optimizing clocking topologies and resolving silicon or programming issues.

Verify SoC and GPU design, architecture and micro-architecture using advanced methodologies. Define verification scope and infrastructure for memory subsystems, verify firmware and hardware/firmware interactions, develop reusable verification components and plans, debug issues, and collaborate with architects, designers, and software engineers across sites.

Design, develop, test, and optimize system software for next-generation ARM-based SoCs across pre- and post-silicon phases. Analyze architectural bottlenecks, workload performance, and performance-per-watt tradeoffs; develop hardware/software policies and optimization strategies. Lead performance analysis, competitive benchmarking, architecture documentation, and adoption of improvements across NVIDIA software products and open-source SDKs.

Build and maintain automation flows and methodologies for VLSI interposer design. Develop tools and applications (Python/C++) to construct, analyze, and validate interposer designs, improve designer workflows, and integrate AI/ML-assisted techniques into EDA environments.