Top Tech Jobs & Startup Jobs in Austin, TX

Develop Rust-to-GPU compiler pipelines, custom intermediate representations, optimizers, and ahead-of-time, just-in-time, and link-time compilation tooling for NVIDIA GPUs. Design Rust-based safety abstractions across GPU execution boundaries and expose low-level CUDA hardware features. Responsibilities include compiler architecture, GPU code generation, debugging, profiling, benchmarking, and independently driving complex engineering initiatives from research through production.

Design and architect GPU and CPU clock domains for ASICs, balancing functional, physical, testing, power, performance, and area requirements. Develop clocking RTL, collaborate with front-end, physical design, timing, verification, DFT, and software teams, and support synthesis, signoff, silicon debugging, and bring-up. The role also involves optimizing clocking topologies and resolving silicon or programming issues.

Design and operate large-scale infrastructure supporting GPU- and CPU-based EDA workloads. Build automation for provisioning, configuration, deployment, lifecycle management, monitoring, health remediation, cluster enrollment, and recovery across Linux compute fleets. Integrate services with schedulers, infrastructure systems, and observability platforms. Participate in incident response, root-cause analysis, capacity planning, and reliability improvements while collaborating with EDA, networking, storage, and hardware teams.

Develop and implement core firmware features for Mellanox NICs supporting cloud, HPC, and storage networking. Collaborate with architecture and software teams, create verification tests, debug complex hardware/software systems, and contribute to firmware maintenance, qualification, and releases. The role requires strong C/C++ development, networking knowledge, PCIe and virtualization experience, scripting skills, and familiarity with distributed, high-performance computing environments.

Develop platform software using container runtimes and Kubernetes to enable GPU-accelerated applications. Build GPU resource support for container orchestrators, integrate software across NVIDIA’s technology stack, and contribute to cloud-native systems. The role requires systems programming, Linux internals, distributed systems, cloud computing, and performance, security, and reliability expertise. Responsibilities include solving complex problems, managing multiple priorities, and collaborating across engineering teams.

Leads NVIDIA’s Infrastructure Security Engineering organization for EDA clusters. Builds and operates security controls across compute, storage, and networking in on-premises and multi-cloud environments while preserving performance for long-running workloads. Owns the technical roadmap, security technology lifecycle, automation, instrumentation, compliance evidence, and cross-functional execution. Develops secure-by-default infrastructure and leads teams responsible for scalable enforcement, observability, mitigation, and security outcomes.

Manage NVIDIA’s global Lenovo OEM account and drive adoption and integration of NVIDIA accelerated computing platforms. Develop technical expertise across AI hardware, networking, software, and reference architectures; identify solution opportunities; package NVIDIA technologies into Lenovo offerings; and develop co-marketing and co-selling strategies. Coordinate product, engineering, supply planning, pricing, quality, and go-to-market teams while building relationships with senior stakeholders and supporting cloud and enterprise sales channels.

Design and deploy test methodologies for advanced NVIDIA silicon, including DFT architectures, ATPG verification, coverage analysis, pattern generation, and ATE bring-up. Partner with EDA vendors, CAD, VLSI, and product engineering teams to develop scalable test solutions. Lead complex scan-test lifecycles, support advanced chiplet and 3D designs, and mentor junior engineers.

Verify ASIC inference accelerator designs at block and SoC levels using advanced methodologies, random stimulus, functional coverage, assertions, and UVM. Develop verification infrastructure, debug designs, optimize automated flows, and collaborate with architects, designers, and pre- and post-silicon teams. Apply knowledge of ASIC design flow, power verification, DFT, netlist verification, and machine learning techniques to improve verification processes.

Own and evolve Kubernetes networking for GPU superclusters spanning multiple clouds and thousands of nodes. Design and operate CNI data planes, overlay meshes, VPNs, gateways, load balancers, and tunnels. Identify scale limitations, build network validation environments, diagnose distributed networking failures, and partner with cloud providers on topology. Provide technical leadership while using strong Linux networking, systems programming, and large-scale debugging expertise.