Top Tech Jobs & Startup Jobs in Austin, TX

Develop and support NVIDIA networking technologies for AI clusters, including InfiniBand, NVLink, and Spectrum-X. Reproduce and root-cause complex customer issues down to source code, collaborate with R&D on fixes, analyze high-performance network metrics, and create diagnostic tools. The role requires extensive C and Python development in Linux and embedded systems, networking expertise, customer support experience, and strong communication skills. Occasional weekend or holiday support may be required.

Architects and develops datacenter power and performance-management software, including real-time controllers, dynamic provisioning, power policies, and hardware-software interfaces. Responsibilities span architecture, pre-silicon validation, silicon bring-up, productization, deployment, and production support. The role investigates complex firmware, driver, hardware, and platform issues; develops validation automation; and collaborates with GPU, ASIC, firmware, driver, and datacenter systems teams to optimize performance, power, thermal behavior, reliability, and energy efficiency.

Serve as the senior technical contact for OEM Federal deployments of NVIDIA GPU-accelerated platforms. Own customer issues end to end, including troubleshooting, failure analysis, RMA procedures, root-cause investigation, and coordination with OEM support and NVIDIA engineering. Support secure Federal environments such as FedRAMP, IL5/IL6, and air-gapped SCIF facilities while maintaining sanitization and chain-of-custody requirements. Analyze multi-GPU systems, firmware, operating systems, networking, storage, and distributed workloads, with up to 35% travel.

Architect and develop low-level GPU power and performance-management software, including P-state management, DVFS, real-time controllers, and power-management policies. Lead features through architecture, validation, silicon bring-up, productization, and deployment. Collaborate across hardware, firmware, driver, validation, and data-center teams while debugging complex system issues and developing automation for performance, power efficiency, stability, and reliability.

Verify NVIDIA ASIC, SoC, and GPU designs, architectures, microarchitectures, memory subsystems, firmware, and hardware-software interactions. Develop verification infrastructure using reusable components, random stimulus, functional coverage, assertions, and UVM-equivalent methodologies. Collaborate with architects, designers, and software engineers while debugging complex issues. Preferred experience includes high-speed I/O, memory coherence, embedded firmware, microcontrollers, RISC-V, and verification planning.

Lead static timing analysis and closure for NVIDIA GPUs, CPUs, LPUs, and SoCs across block, cluster, and full-chip levels. Collaborate with RTL, DFX, clock, physical design, and methodology teams to create constraints, improve timing and power convergence, implement ECOs, and enhance timing flows. Analyze crosstalk and noise, optimize physical design, and support advanced process-node timing convergence.

Perform physical mask layout for mixed-signal circuits, including PLLs, high-speed I/O, general I/O, and ESD structures, using Cadence tools and advanced CMOS technologies. Collaborate with ASIC and mixed-signal engineers on floor planning, custom layout, top-level integration, and design verification. Run and debug DRC/LVS checks, customize verification decks, and support tape-outs using FinFET technologies.

Design GPU boot, PCIe/CXL enumeration, and capability-discovery architecture. Develop functional and performance models in C++, create validation test plans, coordinate with software, hardware, and verification teams, and support post-silicon validation. The role requires a computer architecture, computer science, or electrical engineering background, systems coursework, hardware/software interaction knowledge, and strong C++ proficiency. Familiarity with advanced interconnects, scripting, security, encryption, RISC-V, or microcode is advantageous.

Lead full-chip RTL integration for complex ASIC and SoC designs, including IP connectivity, clocking, resets, address mapping, power domains, verification, DFT, and design signoff. Collaborate across architecture, design, verification, DFT, and physical design teams. Perform lint, CDC, RDC, synthesis, and connectivity checks; develop SystemVerilog/UVM verification plans; debug failures; review ATPG and coverage metrics; and automate engineering workflows with scripting.

Provides advanced software and customer support for NVIDIA networking technologies used in AI clusters. Reproduces and root-causes complex field issues to the source-code level, develops fixes and workarounds with R&D, analyzes high-performance network metrics, builds diagnostic tools, and supports technologies including InfiniBand, NVLink, and Spectrum-X. The role requires extensive C or Python experience in Linux or embedded systems, networking expertise, and strong customer communication.