Top Tech Jobs & Startup Jobs in Austin, TX

Designs and optimizes communication architectures, algorithms, and protocols for distributed deep learning training and inference at massive scale. The role eliminates data-transfer and synchronization bottlenecks, develops proof-of-concepts, models performance, and collaborates across hardware and software teams on high-speed interconnects and communication libraries. It requires expertise in LLM performance, parallelism strategies, DNN frameworks, GPU computing, and large-scale system scaling.

Lead a team to optimize algorithms for Deep Learning and Machine Learning, define technical initiatives, and collaborate with various teams for hardware and software innovation.

Develops power architecture methodologies and features for next-generation NVIDIA GPUs and AI systems. The role optimizes power efficiency, performance, voltage-frequency tradeoffs, thermal and electrical constraints, and multi-die packaging solutions. Responsibilities include analyzing peak current, Di/Dt, IR drop, electromigration, power integrity, and board-level power issues while collaborating with ASIC, packaging, product, and engineering teams.

The Senior Software Architect will design and implement communication technologies, improve performance for AI and HPC workloads, and lead innovative GPU communication solutions.

Develop and debug cloud-native solutions for AI/ML datacenters, focusing on Kubernetes and Slurm enhancements and customer workflows.

Design and implement GPU performance analysis and profiling capabilities for NVIDIA hardware, drivers, and SDKs. Analyze chip features, prototype and refine data collection methods, collaborate with architects and developer tools engineers, and ensure observability of critical performance behaviors for next-generation GPUs and SoCs.

The role involves designing and maintaining verification environments, developing test plans, creating UVM components, launching regressions, and collaborating with engineers to ensure high-quality IP delivery.

As an EDA Workflow Optimization Engineer, you will optimize and enhance workflows for chip development, working with teams to investigate, debug, and innovate tools for efficient engineering processes.

Design future GPU hardware features for deep learning training and inference, advance parallel computing, develop simulators and analysis tools, and create testing infrastructure. Collaborate with architects and researchers to map workloads to hardware and validate architectural features using software models, RTL, and real silicon.

Verify SoC and GPU design, architecture and micro-architecture using advanced methodologies. Define verification scope and infrastructure for memory subsystems, verify firmware and hardware/firmware interactions, develop reusable verification components and plans, debug issues, and collaborate with architects, designers, and software engineers across sites.