Top Tech Jobs & Startup Jobs in Austin, TX

Lead technical engagements with cloud service providers on rack-scale system software and firmware. Drive architecture alignment, integration readiness, error handling and recovery, health telemetry, firmware orchestration, and serviceability. Capture CSP feedback, influence NVIDIA system software design, improve tooling and tests, and mitigate execution risks through early collaboration.

Design and deliver high-performance, area- and power-efficient ASIC/GPU micro-architecture and RTL. Develop agentic AI solutions to craft micro-architecture, implement RTL, and produce fully verified, synthesis/timing-clean designs. Collaborate with designers and tool owners, and build LLM-powered engineering assistants, multi-agent systems, and multi-modal dialogue tools to accelerate chip design workflows.

Lead security engineering for RTOS, hypervisor, and embedded virtualization: design and review defenses, collaborate on CPU/SoC security, perform threat modeling and automotive TARA, review low-level C/C++ code, build fuzzing and test infrastructure, assess vulnerabilities, and drive security fixes and verification toward automotive safety and security standards.

Design and implement Rust-to-GPU compiler backends, IR frameworks, and JIT/AOT toolchains. Lower Rust AST/MIR to MLIR/LLVM/PTX, build GPU-specific optimizers, enforce safe parallel abstractions across host/device boundaries, and expose ergonomic device-side primitives. Drive projects from research to production and support profiling, debugging, and benchmarking workflows.

Design and optimize low-latency C/C++ systems for real-time streaming over 5G, Wi‑Fi, and other wireless networks. Integrate with cellular and platform APIs, analyze packet captures and telemetry to fix latency and packet loss, develop KPIs and test frameworks, build realistic wireless simulations, and partner with cloud, automotive, carrier, and platform teams to deliver scalable connectivity solutions.

The role involves researching and developing GPU-accelerated AI workloads, optimizing algorithms, and collaborating with technical experts to improve hardware performance.

Lead a team to optimize algorithms for Deep Learning and Machine Learning, define technical initiatives, and collaborate with various teams for hardware and software innovation.

Design and implement an MLIR-based AI compiler for GPU inference: develop graph representations and dialects, optimize performance and memory, define APIs, generate kernels, and collaborate with framework and hardware teams to enable new model patterns and GPU features.

The role focuses on optimizing and managing workload scheduling systems for EDA, enhancing observability, service reliability, and automation while resolving performance issues.

Develop and implement compiler optimization algorithms and code generation for deep learning workloads (XLA/OpenXLA) targeting NVIDIA GPUs. Design graph partitioning and tensor sharding for distributed training/inference, performance tune models, work with ML frameworks (JAX) and hardware teams, and contribute to compiler/tooling (MLIR/LLVM/Triton).