Top Tech Jobs & Startup Jobs in Austin, TX

Lead system architecture for next-generation ultra-low-power AI SoCs from concept through production. Define processor, memory, interconnect, clocking, power, accelerator, and hardware/software partitioning strategies while managing power, performance, and area tradeoffs. Develop architecture specifications and models, evaluate IP, guide silicon implementation and validation, collaborate with customers and cross-functional engineering teams, and mentor architecture staff.

Responsible for post-silicon validation and characterization of analog and mixed-signal SoC subsystems. Develop validation plans, automate testing and data analysis, characterize silicon across process, voltage, and temperature, analyze performance, correlate results with simulation and production data, and debug analog, digital, firmware, power, and board-level interactions. The role also supports validation hardware, lab infrastructure, test coverage, yield improvement, and production readiness.

Designs and develops PCB-based evaluation hardware for low-power, ARM-based SoCs. Responsibilities include hardware architecture, schematic and layout design, system bring-up, lab debugging, manufacturing test development, customer hardware reviews, issue resolution, embedded software support, and creation of application notes and hardware design guidelines.

Own end-to-end digital design verification for complex SoCs at block, subsystem, and full-chip levels. Develop UVM/SystemVerilog testbenches, verification plans, constrained-random and directed tests, scoreboards, coverage models, and C/C++ SoC validation libraries. Automate regressions and reporting, debug failures, perform root-cause analysis, and collaborate with architecture, design, and software teams. The role requires managing verification milestones, risks, and deliverables through multiple successful tape-outs.

The Senior Staff SoC Power and Performance Architect role focuses on advancing ultra-low-power semiconductor solutions for AI edge, wearable, medical device, and IoT applications. The position is based onsite five days per week in Austin and appears intended to lead SoC power and performance architecture in collaboration with cross-functional engineering and product teams. Detailed responsibilities and qualifications were not provided in the posting.

Lead and scale Ambiq's silicon validation organization, define post-silicon validation strategy and automation, drive bring-up, characterization, debug, and production correlation, build global teams and lab infrastructure, manage priorities across concurrent programs, and provide technical leadership for complex silicon issues and customer escalations.

Lead software architecture for low-power Edge AI MCUs: define requirements, perform functional allocation, prototype, guide implementation and testing, optimize performance/power, enforce standards, and mentor engineers.

The Head of Investor Relations leads the global IR program for a semiconductor company, managing investor communications, strategic positioning, earnings processes, and relationships with the investment community to enhance credibility and investor understanding.

Lead DFT strategy for ultra-low-power SoCs: design and implement scan, boundary scan, MBIST, ATPG and low-power DFT architectures; generate and analyze structural test vectors; run pre/post-layout simulations; collaborate with design, verification, and test teams to optimize coverage, test time, cost, and bring-up test vectors on silicon.

Lead enterprise AI enablement by identifying high-value AI opportunities, redesigning workflows, building business cases, running pilots, driving adoption, establishing governance and metrics, and building organizational AI literacy to improve engineering productivity and business outcomes.