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The Senior Staff SoC Power and Performance Architect role focuses on advancing ultra-low-power semiconductor solutions for AI edge, wearable, medical device, and IoT applications. The position is based onsite five days per week in Austin and appears intended to lead SoC power and performance architecture in collaboration with cross-functional engineering and product teams. Detailed responsibilities and qualifications were not provided in the posting.

Lead and scale Ambiq's silicon validation organization, define post-silicon validation strategy and automation, drive bring-up, characterization, debug, and production correlation, build global teams and lab infrastructure, manage priorities across concurrent programs, and provide technical leadership for complex silicon issues and customer escalations.

Lead software architecture for low-power Edge AI MCUs: define requirements, perform functional allocation, prototype, guide implementation and testing, optimize performance/power, enforce standards, and mentor engineers.

Architect and implement SoC/MCU RTL (Verilog/SystemVerilog), own complex blocks from spec through tapeout, integrate IP and ARM subsystems, collaborate with verification and physical design, resolve LINT/CDC/RDC issues, support FPGA prototyping and silicon bring-up, and mentor junior engineers.

Lead post-silicon validation and optimization of BLE and other wireless radio subsystems. Define validation methodologies, build automation and firmware for RF/PHY characterization, design RF lab hardware/infrastructure, execute RF performance and power tests, debug system-level issues, and mentor engineers to improve wireless performance and production correlation.

Lead post-silicon power validation, characterization, and optimization for ultra-low-power mixed-signal SoCs. Develop validation methodologies, automation frameworks, firmware, and hardware for precision power measurement. Analyze power across modes and workloads, collaborate with cross-functional teams to resolve silicon issues, and mentor engineers while delivering scalable validation infrastructure and lab automation.

Develop and support Ambiq's Trusted Execution Environment and related security implementations for embedded systems, ensuring compliance with security standards and seamless integration with customer builds.

The Sr Director of System Architecture leads the development of ultra-low-power, AI-based SoC architectures and coordinates teams to drive specifications, power/performance analysis, and integration into products.

The Principal Engineer - RTL will oversee pre-tape out quality for digital SoC modules, lead architecture and micro-architecture development, and manage RTL development. Responsibilities include IP integration, collaboration with verification teams, and assisting in silicon validation.

Lead end-to-end digital verification for complex SoCs, developing UVM/SystemVerilog testbenches, SoC-level C/C++ tests, automation, coverage goals, debugging, and collaborate with design teams to ensure production-ready silicon.