Top Tech Jobs & Startup Jobs in Austin, TX

Lead a global Silicon CAD organization across FE and BE flows (RTL to GDSII). Define methodology, AI-enabled automation, EDA and foundry strategy, and drive execution, standardization, and team growth to deliver predictable, high-performance silicon.

The IFM Contract Relationship Manager will manage supplier relationships, oversee contract negotiations, develop strategies, and ensure compliance and governance across regions.

Serve as primary technical advisor for Global Strategic Accounts in the southeastern U.S.; lead discovery workshops, design solution architectures and multi-year technology roadmaps, run RFPs/RFIs/proofs-of-concept, deliver executive presentations and technical demos, and collaborate cross-functionally to drive account growth and product strategy.

Design, develop, deploy, and support front-end CAD tool flows and EDA workflows for ASIC/SoC frontend design and verification. Drive methodology improvements, troubleshoot and optimize toolchains, collaborate across design, verification, test, and manufacturing teams, and implement processes to ensure silicon quality through rigorous reviews and testing.

Develop and execute SoC-level verification tests across SystemC/TLM, RTL, and emulation environments. Define verification strategies, verify high-speed interfaces and internal functionality, participate in silicon-level verification, and collaborate with cross-functional teams to ensure coverage and quality.

Lead block- and top-level ASIC/IP verification: architect and build RTL testbenches using SystemVerilog/UVM, develop TLM behavioral models, run hardware emulation/acceleration and SW-driven verification, mentor team members, and define verification strategy and best practices for 5G ASIC IP.

Lead development and implementation of verification methodologies for ASIC IP and SoC. Oversee verification lifecycle, drive adoption of verification tools, mentor engineers, resolve complex verification issues, coordinate global teams, define metrics, and collaborate with design and architecture to ensure timely delivery of high-quality IP and SoC.

As a Senior AI Compiler Engineer, you will design and build a custom MLIR-based compiler stack for next-gen silicon, optimizing AI models without an OS. Responsibilities include creating MLIR dialects, ensuring accuracy in lowering computational graphs, and maintaining a high-performance compiler codebase.

The Principal RTL Methodology Architect will lead the development of scalable frontend design methodologies, ensuring high RTL quality and implementing AI enhancements in silicon design.

As a Senior AI Compiler Engineer, you'll design and implement MLIR-based compilers for 5G/6G silicon, ensuring high precision in hardware-specific IR generation and memory management with a focus on advanced compiler techniques.