Top Tech Jobs & Startup Jobs in Austin, TX

Build and operate Arm’s production AI platform infrastructure, including model gateways, MCP services, and control-plane components. Own scalability, reliability, observability, security, incident response, automation, lifecycle management, and operational readiness. Develop infrastructure-as-code and GitOps workflows, secure runtime patterns, telemetry, monitoring, alerting, and support processes across Kubernetes, cloud, identity, networking, secrets, and compliance systems. Participate in a paid on-call rotation for high-impact incidents.

Design and verification engineer for Arm’s next-generation network-on-chip interconnect products. Responsibilities include specifying, creating, and debugging SystemVerilog/UVM constrained-random testbenches; verifying multiprocessing microarchitectures, cache coherence, and AMBA protocols; applying software engineering, scripting, and formal verification skills to ensure reliable, high-performance silicon IP.

Own end-to-end ASIC physical implementation from RTL through GDSII and tapeout for complex CPU, GPU, interconnect, and SoC designs. Drive timing, power, physical, and signoff closure across MCMM scenarios; collaborate with architecture, RTL, DFT, EDA vendors, and foundries; resolve implementation issues; and improve automation, methodologies, and flows for geographically distributed teams.

Leads global sourcing strategy for semiconductor foundry and ASIC services from product development through high-volume manufacturing. Manages foundry and ASIC supplier relationships, negotiations, capacity reservations, pricing, NRE, masks, and long-term agreements. Builds semiconductor cost models, secures advanced-node capacity, mitigates supply and technology risks, monitors market dynamics, and presents sourcing recommendations to senior leadership. Partners cross-functionally with engineering, product, operations, finance, and supply chain teams.

Leads global sourcing strategy for semiconductor IC test equipment, hardware, and outsourced test services. Manages ATE platforms, OSAT relationships, supplier negotiations, test capacity planning, equipment deployment, capital investments, utilization, and lifecycle management. Partners with engineering and operations teams to support product development, qualification, ramp, and high-volume manufacturing while presenting sourcing strategies, costs, risks, and capacity plans to senior leadership.

Owns component engineering strategy and lifecycle risk management for board-level electronics from architecture and NPI through production and end of life. Responsibilities include component selection, characterization, qualification, alternate-source development, BOM risk analysis, dual-sourcing, obsolescence mitigation, supplier collaboration, reliability support, and component governance. The role partners with Electrical Engineering, Supply Chain, Manufacturing, Quality, suppliers, and contract manufacturers to balance technical performance, reliability, cost, availability, and lifecycle risk.

Conduct original robotics research across areas such as robot learning, perception, planning, control, safety, systems, and mechatronics. Develop and implement novel methods on real robots and in simulation, integrate capabilities into intelligent systems, publish research, identify system-level requirements, and collaborate with multidisciplinary researchers and external partners to shape Arm’s robotics technology roadmap.

Conduct original robotics research across learning, perception, planning, control, safety, systems, and mechatronics. Develop and evaluate methods on real robotic platforms and simulations, integrate multidisciplinary capabilities into intelligent systems, publish research, identify system-level bottlenecks, and influence the technical roadmap for future robotics compute and software platforms.

Develop and deploy Raven, a C++ dynamic random test generator for Arm CPU verification. Responsibilities include implementing verification functionality, creating test templates for architectural and microarchitectural features, debugging user and QA issues, collaborating with CPU verification engineers, and applying computer architecture specifications. The role requires strong C++ development, assembly programming, computer architecture knowledge, and familiarity with CPU verification environments.

Develop cycle-accurate performance models for coherent and non-coherent Arm interconnects. Collaborate with micro-architects, RTL, validation teams, and customers to assess architectural trade-offs, develop features, build performance test suites, identify bottlenecks, and deliver data-driven system performance insights. The role requires strong C++, SystemC TLM, and Python skills, plus expertise in SoC performance modeling and computer architecture.