Top Tech Jobs & Startup Jobs in Austin, TX

Build functional, performance, energy, power, and area models for AI accelerator workloads and hardware/software co-design. Bring up PyTorch and Hugging Face workloads, model optical GEMM, memory systems, tiling, scheduling, ISA, NoC traffic, and multi-chip mapping. Develop Python analytical models and bit-accurate C++ simulations, contribute to event-driven simulation infrastructure, correlate models with RTL through Verilator and SystemVerilog, establish modeling methodology, and mentor engineers.

Own performance and energy benchmarking for an optical AI inference accelerator. Build reproducible benchmarks across analytical models, architecture models, RTL simulation, and competitor GPUs. Bring up workloads from Hugging Face, PyTorch, papers, and inference stacks; measure latency, throughput, power, and energy; analyze bottlenecks; operate cloud or lab environments; and document configurations, logs, assumptions, and discrepancies.

Lead integration of full-chip or major SoC subsystems, owning top-level flows and cross-domain decisions across DFT, power, timing, and interconnect architecture. Partner with architecture, RTL, physical design, verification, and DFT teams to resolve system tradeoffs. Support organizational growth through hiring and mentoring while remaining hands-on with advanced-node, high-bandwidth, low-power chip designs.

Lead end-to-end physical design and SoC implementation from synthesis through tapeout on advanced process nodes. Build and automate synthesis, timing closure, power, clock, physical verification, and IP/library management flows. Integrate analog and mixed-signal components, support new process technologies, and collaborate with RTL, DV, and analog teams. Build, hire, and manage a multi-site physical design organization delivering optimized GDSII implementations for complex SoCs.

The Principal Analog Design Engineer will design high-speed analog circuits and collaborate with teams to optimize performance in photonic AI systems.

Develop hardware-aware post-training quantization and model adaptation methods for LLMs, diffusion models, and other machine learning applications targeting optical inference hardware. The role involves numerical and constrained optimization, controlled experiments, research-quality implementations, model deployment across PyTorch, Triton, and JAX, GEMM optimization, and collaboration with hardware and software teams to co-optimize AI architectures. The engineer will also publish research while protecting company intellectual property.