Top Tech Jobs & Startup Jobs in Austin, TX

Lead the development and governance of analog/mixed-signal design environments. Oversee EDA tool ecosystems, compute infrastructure, design data governance, and tapeout management. Manage engineers, collaborate with IT, and optimize design flows to enhance productivity and reproducibility.

Lead physical design timing efforts for next-generation SoCs: perform timing analysis and optimization, generate and validate timing constraints, define PVT conditions, develop timing models and flows, collaborate with clocking, architecture, and logic teams to ensure high-performance, low-power chip integration.

The Consumer Industries Solution Lead at Intel will manage strategic roadmaps and develop AI-driven solutions for retail and transactional systems, requiring strong collaboration and industry expertise.

The Module Development Engineer leads technology development for manufacturing processes, conducts studies, and collaborates with suppliers to optimize semiconductor equipment and techniques.

Develop and maintain transistor-level timing characterization flows, CAD infrastructure, and automation for custom IPs and memory. Collaborate with circuit, memory, STA, and methodology teams; validate Liberty models and SPICE-based characterizations; support platforms, scripts, and EDA vendor tool evaluations.

Develop and maintain transistor-level electromigration (EM) and IR drop analysis flows for custom IP, SRAM, analog/mixed-signal interfaces, and high-performance macros. Build CAD methodology, automation infrastructure, and power-integrity signoff flows, perform silicon correlation, and collaborate with circuit design, physical design, package, reliability, and signoff teams to enable scalable, accurate reliability verification using industry EM/IR tools.

Develop and maintain full-chip physical implementation flows for SoC designs, including floorplanning, partitioning, hierarchical block integration, placement and routing coordination, power grid planning and IR analysis, CTS strategy integration, and scalable multi-block/multi-power-domain assembly methodologies using Innovus.

Design and optimize analog and mixed-signal circuits (ADCs, DACs, regulators, high-speed I/O) for advanced process nodes. Perform circuit-level simulation, layout verification, floorplanning, tape-out activities, test plan development, and post-silicon debug while collaborating with architecture, layout, process, and product teams to meet PPA and yield targets.

Lead development and execution of CPU functional verification plans. Build scalable UVM testbenches, run system-level simulations, debug pre-silicon issues, collaborate with architects and RTL designers, document strategies, and maintain verification infrastructure to ensure CPU logic correctness.

As a SoC Logic Design Engineer, you will develop RTL designs, optimize logic for performance, and ensure design integrity while collaborating with various teams.